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YAHAL
Yet Another Hardware Abstraction Library
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Definitions for base addresses, unions, and structures. More...
Topics | |
| Backwards Compatibility Aliases | |
| Register alias definitions for backwards compatibility. | |
| #define | SCS_BASE (0xE000E000UL) |
| #define | ITM_BASE (0xE0000000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | ITM_BASE (0xE0000000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | ITM_BASE (0xE0000000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | ITM_BASE (0xE0000000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | ITM_BASE (0xE0000000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | ITM_BASE (0xE0000000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | ITM_BASE (0xE0000000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | ITM_BASE (0xE0000000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | ITM_BASE (0xE0000000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | ITM_BASE (0xE0000000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | ITM_BASE (0xE0000000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | ITM_BASE (0xE0000000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | ITM_BASE (0xE0000000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | ITM_BASE (0xE0000000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| #define | SCS_BASE (0xE000E000UL) |
| #define | ITM_BASE (0xE0000000UL) |
| #define | DWT_BASE (0xE0001000UL) |
| #define | TPI_BASE (0xE0040000UL) |
| #define | CoreDebug_BASE (0xE000EDF0UL) |
| #define | SysTick_BASE (SCS_BASE + 0x0010UL) |
| #define | NVIC_BASE (SCS_BASE + 0x0100UL) |
| #define | SCB_BASE (SCS_BASE + 0x0D00UL) |
| #define | SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
| #define | SCB ((SCB_Type *) SCB_BASE ) |
| #define | SysTick ((SysTick_Type *) SysTick_BASE ) |
| #define | NVIC ((NVIC_Type *) NVIC_BASE ) |
| #define | ITM ((ITM_Type *) ITM_BASE ) |
| #define | DWT ((DWT_Type *) DWT_BASE ) |
| #define | TPI ((TPI_Type *) TPI_BASE ) |
| #define | CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
| #define | FPU_BASE (SCS_BASE + 0x0F30UL) |
| #define | FPU ((FPU_Type *) FPU_BASE ) |
| #define | DCB_BASE (0xE000EDF0UL) |
| #define | DIB_BASE (0xE000EFB0UL) |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| #define | DCB_BASE (0xE000EDF0UL) |
| #define | DIB_BASE (0xE000EFB0UL) |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| #define | DCB_BASE (0xE000EDF0UL) |
| #define | DIB_BASE (0xE000EFB0UL) |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| #define | DCB_BASE (0xE000EDF0UL) |
| #define | DIB_BASE (0xE000EFB0UL) |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| #define | DCB_BASE (0xE000EDF0UL) |
| #define | DIB_BASE (0xE000EFB0UL) |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| #define | DCB_BASE (0xE000EDF0UL) |
| #define | DIB_BASE (0xE000EFB0UL) |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| #define | DCB_BASE (0xE000EDF0UL) |
| #define | DIB_BASE (0xE000EFB0UL) |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| #define | DCB_BASE (0xE000EDF0UL) |
| #define | DIB_BASE (0xE000EFB0UL) |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| #define | DCB_BASE (0xE000EDF0UL) |
| #define | DIB_BASE (0xE000EFB0UL) |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| #define | DCB_BASE (0xE000EDF0UL) |
| #define | DIB_BASE (0xE000EFB0UL) |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| #define | DCB_BASE (0xE000EDF0UL) |
| #define | DIB_BASE (0xE000EFB0UL) |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| #define | DCB_BASE (0xE000EDF0UL) |
| #define | DIB_BASE (0xE000EFB0UL) |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| #define | DCB_BASE (0xE000EDF0UL) |
| #define | DIB_BASE (0xE000EFB0UL) |
| #define | DCB ((DCB_Type *) DCB_BASE ) |
| #define | DIB ((DIB_Type *) DIB_BASE ) |
| #define | MEMSYSCTL_BASE (0xE001E000UL) |
| #define | ERRBNK_BASE (0xE001E100UL) |
| #define | PWRMODCTL_BASE (0xE001E300UL) |
| #define | EWIC_ISA_BASE (0xE001E400UL) |
| #define | PRCCFGINF_BASE (0xE001E700UL) |
| #define | EWIC_BASE (0xE0047000UL) |
| #define | ICB ((ICB_Type *) SCS_BASE ) |
| #define | MEMSYSCTL ((MemSysCtl_Type *) MEMSYSCTL_BASE ) |
| #define | ERRBNK ((ErrBnk_Type *) ERRBNK_BASE ) |
| #define | PWRMODCTL ((PwrModCtl_Type *) PWRMODCTL_BASE ) |
| #define | EWIC_ISA ((EWIC_ISA_Type *) EWIC_ISA_BASE ) |
| #define | EWIC ((EWIC_Type *) EWIC_BASE ) |
| #define | PRCCFGINF ((PrcCfgInf_Type *) PRCCFGINF_BASE ) |
| #define | MEMSYSCTL_BASE (0xE001E000UL) |
| #define | ERRBNK_BASE (0xE001E100UL) |
| #define | PWRMODCTL_BASE (0xE001E300UL) |
| #define | EWIC_ISA_BASE (0xE001E400UL) |
| #define | PRCCFGINF_BASE (0xE001E700UL) |
| #define | EWIC_BASE (0xE0047000UL) |
| #define | ICB ((ICB_Type *) SCS_BASE ) |
| #define | MEMSYSCTL ((MemSysCtl_Type *) MEMSYSCTL_BASE ) |
| #define | ERRBNK ((ErrBnk_Type *) ERRBNK_BASE ) |
| #define | PWRMODCTL ((PwrModCtl_Type *) PWRMODCTL_BASE ) |
| #define | EWIC_ISA ((EWIC_ISA_Type *) EWIC_ISA_BASE ) |
| #define | EWIC ((EWIC_Type *) EWIC_BASE ) |
| #define | PRCCFGINF ((PrcCfgInf_Type *) PRCCFGINF_BASE ) |
| #define | STL_BASE (0xE001E800UL) |
| #define | STL ((STL_Type *) STL_BASE ) |
| #define | EMSS_BASE (0xE001E000UL) |
| #define | EMSS ((EMSS_Type *) EMSS_BASE ) |
Definitions for base addresses, unions, and structures.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct
Definition at line 3135 of file core_armv81mml.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct
Definition at line 1322 of file core_armv8mbl.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct
Definition at line 2165 of file core_armv8mml.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct
Definition at line 1397 of file core_cm23.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
Core Debug configuration struct
Definition at line 1401 of file core_cm3.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct
Definition at line 2240 of file core_cm33.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct
Definition at line 2240 of file core_cm35p.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
Core Debug configuration struct
Definition at line 1578 of file core_cm4.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct
Definition at line 3689 of file core_cm55.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
Core Debug configuration struct
Definition at line 1805 of file core_cm7.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct
Definition at line 3592 of file core_cm85.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
Core Debug configuration struct
Definition at line 1384 of file core_sc300.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct
Definition at line 3135 of file core_armv81mml.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct
Definition at line 1322 of file core_armv8mbl.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct
Definition at line 2165 of file core_armv8mml.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE ) |
Core Debug configuration struct
Definition at line 2240 of file core_cm33.h.
| #define CoreDebug ((CoreDebug_Type *) CoreDebug_BASE) |
Core Debug configuration struct
Definition at line 1578 of file core_cm4.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address
Definition at line 3121 of file core_armv81mml.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address
Definition at line 1309 of file core_armv8mbl.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address
Definition at line 2151 of file core_armv8mml.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address
Definition at line 1384 of file core_cm23.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address
Definition at line 1389 of file core_cm3.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address
Definition at line 2226 of file core_cm33.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address
Definition at line 2226 of file core_cm35p.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address
Definition at line 1566 of file core_cm4.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address
Definition at line 3668 of file core_cm55.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address
Definition at line 1793 of file core_cm7.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address
Definition at line 3572 of file core_cm85.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address
Definition at line 1372 of file core_sc300.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address
Definition at line 3121 of file core_armv81mml.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address
Definition at line 1309 of file core_armv8mbl.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address
Definition at line 2151 of file core_armv8mml.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address
Definition at line 2226 of file core_cm33.h.
| #define CoreDebug_BASE (0xE000EDF0UL) |
Core Debug Base Address
Definition at line 1566 of file core_cm4.h.
DCB configuration struct
Definition at line 3136 of file core_armv81mml.h.
DCB configuration struct
Definition at line 1323 of file core_armv8mbl.h.
DCB configuration struct
Definition at line 2166 of file core_armv8mml.h.
DCB configuration struct
Definition at line 1398 of file core_cm23.h.
DCB configuration struct
Definition at line 2241 of file core_cm33.h.
DCB configuration struct
Definition at line 2241 of file core_cm35p.h.
DCB configuration struct
Definition at line 3690 of file core_cm55.h.
DCB configuration struct
Definition at line 3593 of file core_cm85.h.
DCB configuration struct
Definition at line 2168 of file core_starmc1.h.
DCB configuration struct
Definition at line 3136 of file core_armv81mml.h.
DCB configuration struct
Definition at line 1323 of file core_armv8mbl.h.
DCB configuration struct
Definition at line 2166 of file core_armv8mml.h.
DCB configuration struct
Definition at line 2241 of file core_cm33.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address
Definition at line 3122 of file core_armv81mml.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address
Definition at line 1310 of file core_armv8mbl.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address
Definition at line 2152 of file core_armv8mml.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address
Definition at line 1385 of file core_cm23.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address
Definition at line 2227 of file core_cm33.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address
Definition at line 2227 of file core_cm35p.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address
Definition at line 3669 of file core_cm55.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address
Definition at line 3573 of file core_cm85.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address
Definition at line 2153 of file core_starmc1.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address
Definition at line 3122 of file core_armv81mml.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address
Definition at line 1310 of file core_armv8mbl.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address
Definition at line 2152 of file core_armv8mml.h.
| #define DCB_BASE (0xE000EDF0UL) |
DCB Base Address
Definition at line 2227 of file core_cm33.h.
DIB configuration struct
Definition at line 3137 of file core_armv81mml.h.
DIB configuration struct
Definition at line 1324 of file core_armv8mbl.h.
DIB configuration struct
Definition at line 2167 of file core_armv8mml.h.
DIB configuration struct
Definition at line 1399 of file core_cm23.h.
DIB configuration struct
Definition at line 2242 of file core_cm33.h.
DIB configuration struct
Definition at line 2242 of file core_cm35p.h.
DIB configuration struct
Definition at line 3691 of file core_cm55.h.
DIB configuration struct
Definition at line 3594 of file core_cm85.h.
DIB configuration struct
Definition at line 2169 of file core_starmc1.h.
DIB configuration struct
Definition at line 3137 of file core_armv81mml.h.
DIB configuration struct
Definition at line 1324 of file core_armv8mbl.h.
DIB configuration struct
Definition at line 2167 of file core_armv8mml.h.
DIB configuration struct
Definition at line 2242 of file core_cm33.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address
Definition at line 3123 of file core_armv81mml.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address
Definition at line 1311 of file core_armv8mbl.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address
Definition at line 2153 of file core_armv8mml.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address
Definition at line 1386 of file core_cm23.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address
Definition at line 2228 of file core_cm33.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address
Definition at line 2228 of file core_cm35p.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address
Definition at line 3670 of file core_cm55.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address
Definition at line 3574 of file core_cm85.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address
Definition at line 2154 of file core_starmc1.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address
Definition at line 3123 of file core_armv81mml.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address
Definition at line 1311 of file core_armv8mbl.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address
Definition at line 2153 of file core_armv8mml.h.
| #define DIB_BASE (0xE000EFB0UL) |
DIB Base Address
Definition at line 2228 of file core_cm33.h.
DWT configuration struct
Definition at line 3133 of file core_armv81mml.h.
DWT configuration struct
Definition at line 1320 of file core_armv8mbl.h.
DWT configuration struct
Definition at line 2163 of file core_armv8mml.h.
DWT configuration struct
Definition at line 1395 of file core_cm23.h.
DWT configuration struct
Definition at line 1399 of file core_cm3.h.
DWT configuration struct
Definition at line 2238 of file core_cm33.h.
DWT configuration struct
Definition at line 2238 of file core_cm35p.h.
DWT configuration struct
Definition at line 1576 of file core_cm4.h.
DWT configuration struct
Definition at line 3680 of file core_cm55.h.
DWT configuration struct
Definition at line 1803 of file core_cm7.h.
DWT configuration struct
Definition at line 3584 of file core_cm85.h.
DWT configuration struct
Definition at line 1382 of file core_sc300.h.
DWT configuration struct
Definition at line 2166 of file core_starmc1.h.
DWT configuration struct
Definition at line 3133 of file core_armv81mml.h.
DWT configuration struct
Definition at line 1320 of file core_armv8mbl.h.
DWT configuration struct
Definition at line 2163 of file core_armv8mml.h.
DWT configuration struct
Definition at line 2238 of file core_cm33.h.
DWT configuration struct
Definition at line 1576 of file core_cm4.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
Definition at line 3119 of file core_armv81mml.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
Definition at line 1307 of file core_armv8mbl.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
Definition at line 2149 of file core_armv8mml.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
Definition at line 1382 of file core_cm23.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
Definition at line 1387 of file core_cm3.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
Definition at line 2224 of file core_cm33.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
Definition at line 2224 of file core_cm35p.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
Definition at line 1564 of file core_cm4.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
Definition at line 3659 of file core_cm55.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
Definition at line 1791 of file core_cm7.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
Definition at line 3564 of file core_cm85.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
Definition at line 1370 of file core_sc300.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
Definition at line 2151 of file core_starmc1.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
Definition at line 3119 of file core_armv81mml.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
Definition at line 1307 of file core_armv8mbl.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
Definition at line 2149 of file core_armv8mml.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
Definition at line 2224 of file core_cm33.h.
| #define DWT_BASE (0xE0001000UL) |
DWT Base Address
Definition at line 1564 of file core_cm4.h.
Ehanced MSS Registers struct
Definition at line 2170 of file core_starmc1.h.
| #define EMSS_BASE (0xE001E000UL) |
Enhanced Memory SubSystem Base Address
Definition at line 2155 of file core_starmc1.h.
| #define ERRBNK ((ErrBnk_Type *) ERRBNK_BASE ) |
Error Banking configuration struct
Definition at line 3683 of file core_cm55.h.
| #define ERRBNK ((ErrBnk_Type *) ERRBNK_BASE ) |
Error Banking configuration struct
Definition at line 3587 of file core_cm85.h.
| #define ERRBNK_BASE (0xE001E100UL) |
Error Banking Base Address
Definition at line 3661 of file core_cm55.h.
| #define ERRBNK_BASE (0xE001E100UL) |
Error Banking Base Address
Definition at line 3566 of file core_cm85.h.
EWIC configuration struct
Definition at line 3686 of file core_cm55.h.
EWIC configuration struct
Definition at line 3590 of file core_cm85.h.
| #define EWIC_BASE (0xE0047000UL) |
External Wakeup Interrupt Controller Base Address
Definition at line 3667 of file core_cm55.h.
| #define EWIC_BASE (0xE0047000UL) |
External Wakeup Interrupt Controller Base Address
Definition at line 3571 of file core_cm85.h.
| #define EWIC_ISA ((EWIC_ISA_Type *) EWIC_ISA_BASE ) |
EWIC interrupt status access struct
Definition at line 3685 of file core_cm55.h.
| #define EWIC_ISA ((EWIC_ISA_Type *) EWIC_ISA_BASE ) |
EWIC interrupt status access struct
Definition at line 3589 of file core_cm85.h.
| #define EWIC_ISA_BASE (0xE001E400UL) |
External Wakeup Interrupt Controller interrupt status access Base Address
Definition at line 3663 of file core_cm55.h.
| #define EWIC_ISA_BASE (0xE001E400UL) |
External Wakeup Interrupt Controller interrupt status access Base Address
Definition at line 3568 of file core_cm85.h.
Floating Point Unit
Definition at line 3155 of file core_armv81mml.h.
Floating Point Unit
Definition at line 2180 of file core_armv8mml.h.
Floating Point Unit
Definition at line 2255 of file core_cm33.h.
Floating Point Unit
Definition at line 2255 of file core_cm35p.h.
Floating Point Unit
Definition at line 1586 of file core_cm4.h.
Floating Point Unit
Definition at line 3709 of file core_cm55.h.
Floating Point Unit
Definition at line 1813 of file core_cm7.h.
Floating Point Unit
Definition at line 3612 of file core_cm85.h.
Floating Point Unit
Definition at line 2183 of file core_starmc1.h.
Floating Point Unit
Definition at line 3155 of file core_armv81mml.h.
Floating Point Unit
Definition at line 2180 of file core_armv8mml.h.
Floating Point Unit
Definition at line 2255 of file core_cm33.h.
Floating Point Unit
Definition at line 1586 of file core_cm4.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit
Definition at line 3154 of file core_armv81mml.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit
Definition at line 2179 of file core_armv8mml.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit
Definition at line 2254 of file core_cm33.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit
Definition at line 2254 of file core_cm35p.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit
Definition at line 1585 of file core_cm4.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit
Definition at line 3708 of file core_cm55.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit
Definition at line 1812 of file core_cm7.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit
Definition at line 3611 of file core_cm85.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit
Definition at line 2182 of file core_starmc1.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit
Definition at line 3154 of file core_armv81mml.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit
Definition at line 2179 of file core_armv8mml.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit
Definition at line 2254 of file core_cm33.h.
| #define FPU_BASE (SCS_BASE + 0x0F30UL) |
Floating Point Unit
Definition at line 1585 of file core_cm4.h.
System control Register not in SCB
Definition at line 3675 of file core_cm55.h.
System control Register not in SCB
Definition at line 3579 of file core_cm85.h.
ITM configuration struct
Definition at line 3132 of file core_armv81mml.h.
ITM configuration struct
Definition at line 2162 of file core_armv8mml.h.
ITM configuration struct
Definition at line 1398 of file core_cm3.h.
ITM configuration struct
Definition at line 2237 of file core_cm33.h.
ITM configuration struct
Definition at line 2237 of file core_cm35p.h.
ITM configuration struct
Definition at line 1575 of file core_cm4.h.
ITM configuration struct
Definition at line 3679 of file core_cm55.h.
ITM configuration struct
Definition at line 1802 of file core_cm7.h.
ITM configuration struct
Definition at line 3583 of file core_cm85.h.
ITM configuration struct
Definition at line 1381 of file core_sc300.h.
ITM configuration struct
Definition at line 2165 of file core_starmc1.h.
ITM configuration struct
Definition at line 3132 of file core_armv81mml.h.
ITM configuration struct
Definition at line 2162 of file core_armv8mml.h.
ITM configuration struct
Definition at line 2237 of file core_cm33.h.
ITM configuration struct
Definition at line 1575 of file core_cm4.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address
Definition at line 3118 of file core_armv81mml.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address
Definition at line 2148 of file core_armv8mml.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address
Definition at line 1386 of file core_cm3.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address
Definition at line 2223 of file core_cm33.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address
Definition at line 2223 of file core_cm35p.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address
Definition at line 1563 of file core_cm4.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address
Definition at line 3658 of file core_cm55.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address
Definition at line 1790 of file core_cm7.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address
Definition at line 3563 of file core_cm85.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address
Definition at line 1369 of file core_sc300.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address
Definition at line 2150 of file core_starmc1.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address
Definition at line 3118 of file core_armv81mml.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address
Definition at line 2148 of file core_armv8mml.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address
Definition at line 2223 of file core_cm33.h.
| #define ITM_BASE (0xE0000000UL) |
ITM Base Address
Definition at line 1563 of file core_cm4.h.
| #define MEMSYSCTL ((MemSysCtl_Type *) MEMSYSCTL_BASE ) |
Memory System Control configuration struct
Definition at line 3682 of file core_cm55.h.
| #define MEMSYSCTL ((MemSysCtl_Type *) MEMSYSCTL_BASE ) |
Memory System Control configuration struct
Definition at line 3586 of file core_cm85.h.
| #define MEMSYSCTL_BASE (0xE001E000UL) |
Memory System Control Base Address
Definition at line 3660 of file core_cm55.h.
| #define MEMSYSCTL_BASE (0xE001E000UL) |
Memory System Control Base Address
Definition at line 3565 of file core_cm85.h.
NVIC configuration struct
Definition at line 3131 of file core_armv81mml.h.
NVIC configuration struct
Definition at line 1319 of file core_armv8mbl.h.
NVIC configuration struct
Definition at line 2161 of file core_armv8mml.h.
NVIC configuration struct
Definition at line 546 of file core_cm0.h.
NVIC configuration struct
Definition at line 660 of file core_cm0plus.h.
NVIC configuration struct
Definition at line 573 of file core_cm1.h.
NVIC configuration struct
Definition at line 1394 of file core_cm23.h.
NVIC configuration struct
Definition at line 1397 of file core_cm3.h.
NVIC configuration struct
Definition at line 2236 of file core_cm33.h.
NVIC configuration struct
Definition at line 2236 of file core_cm35p.h.
NVIC configuration struct
Definition at line 1574 of file core_cm4.h.
NVIC configuration struct
Definition at line 3678 of file core_cm55.h.
NVIC configuration struct
Definition at line 1801 of file core_cm7.h.
NVIC configuration struct
Definition at line 3582 of file core_cm85.h.
NVIC configuration struct
Definition at line 675 of file core_sc000.h.
NVIC configuration struct
Definition at line 1380 of file core_sc300.h.
NVIC configuration struct
Definition at line 2164 of file core_starmc1.h.
NVIC configuration struct
Definition at line 546 of file core_cm0.h.
NVIC configuration struct
Definition at line 660 of file core_cm0plus.h.
NVIC configuration struct
Definition at line 3131 of file core_armv81mml.h.
NVIC configuration struct
Definition at line 1319 of file core_armv8mbl.h.
NVIC configuration struct
Definition at line 2161 of file core_armv8mml.h.
NVIC configuration struct
Definition at line 2236 of file core_cm33.h.
NVIC configuration struct
Definition at line 1574 of file core_cm4.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 3125 of file core_armv81mml.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 1313 of file core_armv8mbl.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 2155 of file core_armv8mml.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 541 of file core_cm0.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 655 of file core_cm0plus.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 567 of file core_cm1.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 1388 of file core_cm23.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 1391 of file core_cm3.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 2230 of file core_cm33.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 2230 of file core_cm35p.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 1568 of file core_cm4.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 3672 of file core_cm55.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 1795 of file core_cm7.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 3576 of file core_cm85.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 669 of file core_sc000.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 1374 of file core_sc300.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 2158 of file core_starmc1.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 541 of file core_cm0.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 655 of file core_cm0plus.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 3125 of file core_armv81mml.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 1313 of file core_armv8mbl.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 2155 of file core_armv8mml.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 2230 of file core_cm33.h.
| #define NVIC_BASE (SCS_BASE + 0x0100UL) |
NVIC Base Address
Definition at line 1568 of file core_cm4.h.
| #define PRCCFGINF ((PrcCfgInf_Type *) PRCCFGINF_BASE ) |
Processor Configuration Information configuration struct
Definition at line 3687 of file core_cm55.h.
| #define PRCCFGINF ((PrcCfgInf_Type *) PRCCFGINF_BASE ) |
Processor Configuration Information configuration struct
Definition at line 3591 of file core_cm85.h.
| #define PRCCFGINF_BASE (0xE001E700UL) |
Processor Configuration Information Base Address
Definition at line 3664 of file core_cm55.h.
| #define PRCCFGINF_BASE (0xE001E700UL) |
Processor Configuration Information Base Address
Definition at line 3569 of file core_cm85.h.
| #define PWRMODCTL ((PwrModCtl_Type *) PWRMODCTL_BASE ) |
Power Mode Control configuration struct
Definition at line 3684 of file core_cm55.h.
| #define PWRMODCTL ((PwrModCtl_Type *) PWRMODCTL_BASE ) |
Power Mode Control configuration struct
Definition at line 3588 of file core_cm85.h.
| #define PWRMODCTL_BASE (0xE001E300UL) |
Power Mode Control Base Address
Definition at line 3662 of file core_cm55.h.
| #define PWRMODCTL_BASE (0xE001E300UL) |
Power Mode Control Base Address
Definition at line 3567 of file core_cm85.h.
SCB configuration struct
Definition at line 3129 of file core_armv81mml.h.
SCB configuration struct
Definition at line 1317 of file core_armv8mbl.h.
SCB configuration struct
Definition at line 2159 of file core_armv8mml.h.
SCB configuration struct
Definition at line 544 of file core_cm0.h.
SCB configuration struct
Definition at line 658 of file core_cm0plus.h.
SCB configuration struct
Definition at line 571 of file core_cm1.h.
SCB configuration struct
Definition at line 1392 of file core_cm23.h.
SCB configuration struct
Definition at line 1395 of file core_cm3.h.
SCB configuration struct
Definition at line 2234 of file core_cm33.h.
SCB configuration struct
Definition at line 2234 of file core_cm35p.h.
SCB configuration struct
Definition at line 1572 of file core_cm4.h.
SCB configuration struct
Definition at line 3676 of file core_cm55.h.
SCB configuration struct
Definition at line 1799 of file core_cm7.h.
SCB configuration struct
Definition at line 3580 of file core_cm85.h.
SCB configuration struct
Definition at line 673 of file core_sc000.h.
SCB configuration struct
Definition at line 1378 of file core_sc300.h.
SCB configuration struct
Definition at line 2162 of file core_starmc1.h.
SCB configuration struct
Definition at line 544 of file core_cm0.h.
SCB configuration struct
Definition at line 658 of file core_cm0plus.h.
SCB configuration struct
Definition at line 3129 of file core_armv81mml.h.
SCB configuration struct
Definition at line 1317 of file core_armv8mbl.h.
SCB configuration struct
Definition at line 2159 of file core_armv8mml.h.
SCB configuration struct
Definition at line 2234 of file core_cm33.h.
SCB configuration struct
Definition at line 1572 of file core_cm4.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 3126 of file core_armv81mml.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 1314 of file core_armv8mbl.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 2156 of file core_armv8mml.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 542 of file core_cm0.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 656 of file core_cm0plus.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 568 of file core_cm1.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 1389 of file core_cm23.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 1392 of file core_cm3.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 2231 of file core_cm33.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 2231 of file core_cm35p.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 1569 of file core_cm4.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 3673 of file core_cm55.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 1796 of file core_cm7.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 3577 of file core_cm85.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 670 of file core_sc000.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 1375 of file core_sc300.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 2159 of file core_starmc1.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 542 of file core_cm0.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 656 of file core_cm0plus.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 3126 of file core_armv81mml.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 1314 of file core_armv8mbl.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 2156 of file core_armv8mml.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 2231 of file core_cm33.h.
| #define SCB_BASE (SCS_BASE + 0x0D00UL) |
System Control Block Base Address
Definition at line 1569 of file core_cm4.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB
Definition at line 3128 of file core_armv81mml.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB
Definition at line 2158 of file core_armv8mml.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB
Definition at line 570 of file core_cm1.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB
Definition at line 1394 of file core_cm3.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB
Definition at line 2233 of file core_cm33.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB
Definition at line 2233 of file core_cm35p.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB
Definition at line 1571 of file core_cm4.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB
Definition at line 1798 of file core_cm7.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB
Definition at line 672 of file core_sc000.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB
Definition at line 1377 of file core_sc300.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB
Definition at line 2161 of file core_starmc1.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB
Definition at line 3128 of file core_armv81mml.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB
Definition at line 2158 of file core_armv8mml.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB
Definition at line 2233 of file core_cm33.h.
| #define SCnSCB ((SCnSCB_Type *) SCS_BASE ) |
System control Register not in SCB
Definition at line 1571 of file core_cm4.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 3117 of file core_armv81mml.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 1306 of file core_armv8mbl.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 2147 of file core_armv8mml.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 539 of file core_cm0.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 653 of file core_cm0plus.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 565 of file core_cm1.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 1381 of file core_cm23.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 1385 of file core_cm3.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 2222 of file core_cm33.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 2222 of file core_cm35p.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 1562 of file core_cm4.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 3657 of file core_cm55.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 1789 of file core_cm7.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 3562 of file core_cm85.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 667 of file core_sc000.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 1368 of file core_sc300.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 2149 of file core_starmc1.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 539 of file core_cm0.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 653 of file core_cm0plus.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 3117 of file core_armv81mml.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 1306 of file core_armv8mbl.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 2147 of file core_armv8mml.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 2222 of file core_cm33.h.
| #define SCS_BASE (0xE000E000UL) |
System Control Space Base Address
Definition at line 1562 of file core_cm4.h.
Software Test Library configuration struct
Definition at line 3688 of file core_cm55.h.
| #define STL_BASE (0xE001E800UL) |
Software Test Library Base Address
Definition at line 3665 of file core_cm55.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 3130 of file core_armv81mml.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 1318 of file core_armv8mbl.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 2160 of file core_armv8mml.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 545 of file core_cm0.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 659 of file core_cm0plus.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 572 of file core_cm1.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 1393 of file core_cm23.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 1396 of file core_cm3.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 2235 of file core_cm33.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 2235 of file core_cm35p.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 1573 of file core_cm4.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 3677 of file core_cm55.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 1800 of file core_cm7.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 3581 of file core_cm85.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 674 of file core_sc000.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 1379 of file core_sc300.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 2163 of file core_starmc1.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 545 of file core_cm0.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 659 of file core_cm0plus.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 3130 of file core_armv81mml.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 1318 of file core_armv8mbl.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 2160 of file core_armv8mml.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 2235 of file core_cm33.h.
| #define SysTick ((SysTick_Type *) SysTick_BASE ) |
SysTick configuration struct
Definition at line 1573 of file core_cm4.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 3124 of file core_armv81mml.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 1312 of file core_armv8mbl.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 2154 of file core_armv8mml.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 540 of file core_cm0.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 654 of file core_cm0plus.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 566 of file core_cm1.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 1387 of file core_cm23.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 1390 of file core_cm3.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 2229 of file core_cm33.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 2229 of file core_cm35p.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 1567 of file core_cm4.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 3671 of file core_cm55.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 1794 of file core_cm7.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 3575 of file core_cm85.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 668 of file core_sc000.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 1373 of file core_sc300.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 2157 of file core_starmc1.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 540 of file core_cm0.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 654 of file core_cm0plus.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 3124 of file core_armv81mml.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 1312 of file core_armv8mbl.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 2154 of file core_armv8mml.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 2229 of file core_cm33.h.
| #define SysTick_BASE (SCS_BASE + 0x0010UL) |
SysTick Base Address
Definition at line 1567 of file core_cm4.h.
TPI configuration struct
Definition at line 3134 of file core_armv81mml.h.
TPI configuration struct
Definition at line 1321 of file core_armv8mbl.h.
TPI configuration struct
Definition at line 2164 of file core_armv8mml.h.
TPI configuration struct
Definition at line 1396 of file core_cm23.h.
TPI configuration struct
Definition at line 1400 of file core_cm3.h.
TPI configuration struct
Definition at line 2239 of file core_cm33.h.
TPI configuration struct
Definition at line 2239 of file core_cm35p.h.
TPI configuration struct
Definition at line 1577 of file core_cm4.h.
TPI configuration struct
Definition at line 3681 of file core_cm55.h.
TPI configuration struct
Definition at line 1804 of file core_cm7.h.
TPI configuration struct
Definition at line 3585 of file core_cm85.h.
TPI configuration struct
Definition at line 1383 of file core_sc300.h.
TPI configuration struct
Definition at line 2167 of file core_starmc1.h.
TPI configuration struct
Definition at line 3134 of file core_armv81mml.h.
TPI configuration struct
Definition at line 1321 of file core_armv8mbl.h.
TPI configuration struct
Definition at line 2164 of file core_armv8mml.h.
TPI configuration struct
Definition at line 2239 of file core_cm33.h.
TPI configuration struct
Definition at line 1577 of file core_cm4.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
Definition at line 3120 of file core_armv81mml.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
Definition at line 1308 of file core_armv8mbl.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
Definition at line 2150 of file core_armv8mml.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
Definition at line 1383 of file core_cm23.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
Definition at line 1388 of file core_cm3.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
Definition at line 2225 of file core_cm33.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
Definition at line 2225 of file core_cm35p.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
Definition at line 1565 of file core_cm4.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
Definition at line 3666 of file core_cm55.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
Definition at line 1792 of file core_cm7.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
Definition at line 3570 of file core_cm85.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
Definition at line 1371 of file core_sc300.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
Definition at line 2152 of file core_starmc1.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
Definition at line 3120 of file core_armv81mml.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
Definition at line 1308 of file core_armv8mbl.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
Definition at line 2150 of file core_armv8mml.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
Definition at line 2225 of file core_cm33.h.
| #define TPI_BASE (0xE0040000UL) |
TPI Base Address
Definition at line 1565 of file core_cm4.h.