EWIC_Type Struct Reference
Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » System Controls not in SCB (SCnSCB) | Defines and Type Definitions » Status and Control Registers » Nested Vectored Interrupt Controller (NVIC) » System Control Block (SCB) » Implementation Control Block register (ICB) » System Tick Timer (SysTick) » Instrumentation Trace Macrocell (ITM) » Data Watchpoint and Trace (DWT) » Memory System Control Registers (IMPLEMENTATION DEFINED) » Power Mode Control Registers » External Wakeup Interrupt Controller Registers
Structure type to access the External Wakeup Interrupt Controller Registers (EWIC). More...
#include <core_cm55.h>
Public Attributes | |
| __IOM uint32_t | EWIC_CR |
| __IOM uint32_t | EWIC_ASCR |
| __OM uint32_t | EWIC_CLRMASK |
| __IM uint32_t | EWIC_NUMID |
| uint32_t | RESERVED0 [124U] |
| __IOM uint32_t | EWIC_MASKA |
| __IOM uint32_t | EWIC_MASKn [15] |
| uint32_t | RESERVED1 [112U] |
| __IM uint32_t | EWIC_PENDA |
| __IOM uint32_t | EWIC_PENDn [15] |
| uint32_t | RESERVED2 [112U] |
| __IM uint32_t | EWIC_PSR |
Detailed Description
Structure type to access the External Wakeup Interrupt Controller Registers (EWIC).
Definition at line 1572 of file core_cm55.h.
The documentation for this struct was generated from the following files:
- /builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm55.h
- /builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm85.h
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