Type definitions for the NVIC Registers. More...
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| System Control Block (SCB) | |
| Type definitions for the System Control Block Registers. | |
Detailed Description
Type definitions for the NVIC Registers.
Macro Definition Documentation
◆ NVIC_STIR_INTID_Msk [1/15]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 519 of file core_armv81mml.h.
◆ NVIC_STIR_INTID_Msk [2/15]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 512 of file core_armv8mml.h.
◆ NVIC_STIR_INTID_Msk [3/15]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 369 of file core_cm3.h.
◆ NVIC_STIR_INTID_Msk [4/15]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 512 of file core_cm33.h.
◆ NVIC_STIR_INTID_Msk [5/15]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 512 of file core_cm35p.h.
◆ NVIC_STIR_INTID_Msk [6/15]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 442 of file core_cm4.h.
◆ NVIC_STIR_INTID_Msk [7/15]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 522 of file core_cm55.h.
◆ NVIC_STIR_INTID_Msk [8/15]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 457 of file core_cm7.h.
◆ NVIC_STIR_INTID_Msk [9/15]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 539 of file core_cm85.h.
◆ NVIC_STIR_INTID_Msk [10/15]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 369 of file core_sc300.h.
◆ NVIC_STIR_INTID_Msk [11/15]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 518 of file core_starmc1.h.
◆ NVIC_STIR_INTID_Msk [12/15]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 519 of file core_armv81mml.h.
◆ NVIC_STIR_INTID_Msk [13/15]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 512 of file core_armv8mml.h.
◆ NVIC_STIR_INTID_Msk [14/15]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 512 of file core_cm33.h.
◆ NVIC_STIR_INTID_Msk [15/15]
| #define NVIC_STIR_INTID_Msk (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/) |
STIR: INTLINESNUM Mask
Definition at line 442 of file core_cm4.h.
◆ NVIC_STIR_INTID_Pos [1/15]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 518 of file core_armv81mml.h.
◆ NVIC_STIR_INTID_Pos [2/15]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 511 of file core_armv8mml.h.
◆ NVIC_STIR_INTID_Pos [3/15]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 368 of file core_cm3.h.
◆ NVIC_STIR_INTID_Pos [4/15]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 511 of file core_cm33.h.
◆ NVIC_STIR_INTID_Pos [5/15]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 511 of file core_cm35p.h.
◆ NVIC_STIR_INTID_Pos [6/15]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 441 of file core_cm4.h.
◆ NVIC_STIR_INTID_Pos [7/15]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 521 of file core_cm55.h.
◆ NVIC_STIR_INTID_Pos [8/15]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 456 of file core_cm7.h.
◆ NVIC_STIR_INTID_Pos [9/15]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 538 of file core_cm85.h.
◆ NVIC_STIR_INTID_Pos [10/15]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 368 of file core_sc300.h.
◆ NVIC_STIR_INTID_Pos [11/15]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 517 of file core_starmc1.h.
◆ NVIC_STIR_INTID_Pos [12/15]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 518 of file core_armv81mml.h.
◆ NVIC_STIR_INTID_Pos [13/15]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 511 of file core_armv8mml.h.
◆ NVIC_STIR_INTID_Pos [14/15]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 511 of file core_cm33.h.
◆ NVIC_STIR_INTID_Pos [15/15]
| #define NVIC_STIR_INTID_Pos 0U |
STIR: INTLINESNUM Position
Definition at line 441 of file core_cm4.h.
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