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YAHAL
Yet Another Hardware Abstraction Library
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Type definitions for the Error Banking Registers (ERRBNK) More...
Topics | |
| Processor Configuration Information Registers (IMPLEMENTATION DEFINED) | |
| Type definitions for the Processor Configuration Information Registerss (PRCCFGINF) | |
Type definitions for the Error Banking Registers (ERRBNK)
| #define ERRBNK_DEBR0_BANK_Msk (0x1UL << ERRBNK_DEBR0_BANK_Pos) |
ERRBNK DEBR0: BANK Mask
Definition at line 1749 of file core_cm55.h.
| #define ERRBNK_DEBR0_BANK_Msk (0x1UL << ERRBNK_DEBR0_BANK_Pos) |
ERRBNK DEBR0: BANK Mask
Definition at line 1736 of file core_cm85.h.
| #define ERRBNK_DEBR0_BANK_Pos 16U |
ERRBNK DEBR0: BANK Position
Definition at line 1748 of file core_cm55.h.
| #define ERRBNK_DEBR0_BANK_Pos 16U |
ERRBNK DEBR0: BANK Position
Definition at line 1735 of file core_cm85.h.
| #define ERRBNK_DEBR0_LOCATION_Msk (0x3FFFUL << ERRBNK_DEBR0_LOCATION_Pos) |
ERRBNK DEBR0: LOCATION Mask
Definition at line 1752 of file core_cm55.h.
| #define ERRBNK_DEBR0_LOCATION_Msk (0x3FFFUL << ERRBNK_DEBR0_LOCATION_Pos) |
ERRBNK DEBR0: LOCATION Mask
Definition at line 1739 of file core_cm85.h.
| #define ERRBNK_DEBR0_LOCATION_Pos 2U |
ERRBNK DEBR0: LOCATION Position
Definition at line 1751 of file core_cm55.h.
| #define ERRBNK_DEBR0_LOCATION_Pos 2U |
ERRBNK DEBR0: LOCATION Position
Definition at line 1738 of file core_cm85.h.
| #define ERRBNK_DEBR0_LOCKED_Msk (0x1UL << ERRBNK_DEBR0_LOCKED_Pos) |
ERRBNK DEBR0: LOCKED Mask
Definition at line 1755 of file core_cm55.h.
| #define ERRBNK_DEBR0_LOCKED_Msk (0x1UL << ERRBNK_DEBR0_LOCKED_Pos) |
ERRBNK DEBR0: LOCKED Mask
Definition at line 1742 of file core_cm85.h.
| #define ERRBNK_DEBR0_LOCKED_Pos 1U |
ERRBNK DEBR0: LOCKED Position
Definition at line 1754 of file core_cm55.h.
| #define ERRBNK_DEBR0_LOCKED_Pos 1U |
ERRBNK DEBR0: LOCKED Position
Definition at line 1741 of file core_cm85.h.
| #define ERRBNK_DEBR0_SWDEF_Msk (0x3UL << ERRBNK_DEBR0_SWDEF_Pos) |
ERRBNK DEBR0: SWDEF Mask
Definition at line 1743 of file core_cm55.h.
| #define ERRBNK_DEBR0_SWDEF_Msk (0x3UL << ERRBNK_DEBR0_SWDEF_Pos) |
ERRBNK DEBR0: SWDEF Mask
Definition at line 1730 of file core_cm85.h.
| #define ERRBNK_DEBR0_SWDEF_Pos 30U |
ERRBNK DEBR0: SWDEF Position
Definition at line 1742 of file core_cm55.h.
| #define ERRBNK_DEBR0_SWDEF_Pos 30U |
ERRBNK DEBR0: SWDEF Position
Definition at line 1729 of file core_cm85.h.
| #define ERRBNK_DEBR0_TYPE_Msk (0x1UL << ERRBNK_DEBR0_TYPE_Pos) |
ERRBNK DEBR0: TYPE Mask
Definition at line 1746 of file core_cm55.h.
| #define ERRBNK_DEBR0_TYPE_Msk (0x1UL << ERRBNK_DEBR0_TYPE_Pos) |
ERRBNK DEBR0: TYPE Mask
Definition at line 1733 of file core_cm85.h.
| #define ERRBNK_DEBR0_TYPE_Pos 17U |
ERRBNK DEBR0: TYPE Position
Definition at line 1745 of file core_cm55.h.
| #define ERRBNK_DEBR0_TYPE_Pos 17U |
ERRBNK DEBR0: TYPE Position
Definition at line 1732 of file core_cm85.h.
| #define ERRBNK_DEBR0_VALID_Msk (0x1UL << /*ERRBNK_DEBR0_VALID_Pos*/) |
ERRBNK DEBR0: VALID Mask
Definition at line 1758 of file core_cm55.h.
| #define ERRBNK_DEBR0_VALID_Msk (0x1UL << /*ERRBNK_DEBR0_VALID_Pos*/) |
ERRBNK DEBR0: VALID Mask
Definition at line 1745 of file core_cm85.h.
| #define ERRBNK_DEBR0_VALID_Pos 0U |
ERRBNK DEBR0: VALID Position
Definition at line 1757 of file core_cm55.h.
| #define ERRBNK_DEBR0_VALID_Pos 0U |
ERRBNK DEBR0: VALID Position
Definition at line 1744 of file core_cm85.h.
| #define ERRBNK_DEBR1_BANK_Msk (0x1UL << ERRBNK_DEBR1_BANK_Pos) |
ERRBNK DEBR1: BANK Mask
Definition at line 1768 of file core_cm55.h.
| #define ERRBNK_DEBR1_BANK_Msk (0x1UL << ERRBNK_DEBR1_BANK_Pos) |
ERRBNK DEBR1: BANK Mask
Definition at line 1755 of file core_cm85.h.
| #define ERRBNK_DEBR1_BANK_Pos 16U |
ERRBNK DEBR1: BANK Position
Definition at line 1767 of file core_cm55.h.
| #define ERRBNK_DEBR1_BANK_Pos 16U |
ERRBNK DEBR1: BANK Position
Definition at line 1754 of file core_cm85.h.
| #define ERRBNK_DEBR1_LOCATION_Msk (0x3FFFUL << ERRBNK_DEBR1_LOCATION_Pos) |
ERRBNK DEBR1: LOCATION Mask
Definition at line 1771 of file core_cm55.h.
| #define ERRBNK_DEBR1_LOCATION_Msk (0x3FFFUL << ERRBNK_DEBR1_LOCATION_Pos) |
ERRBNK DEBR1: LOCATION Mask
Definition at line 1758 of file core_cm85.h.
| #define ERRBNK_DEBR1_LOCATION_Pos 2U |
ERRBNK DEBR1: LOCATION Position
Definition at line 1770 of file core_cm55.h.
| #define ERRBNK_DEBR1_LOCATION_Pos 2U |
ERRBNK DEBR1: LOCATION Position
Definition at line 1757 of file core_cm85.h.
| #define ERRBNK_DEBR1_LOCKED_Msk (0x1UL << ERRBNK_DEBR1_LOCKED_Pos) |
ERRBNK DEBR1: LOCKED Mask
Definition at line 1774 of file core_cm55.h.
| #define ERRBNK_DEBR1_LOCKED_Msk (0x1UL << ERRBNK_DEBR1_LOCKED_Pos) |
ERRBNK DEBR1: LOCKED Mask
Definition at line 1761 of file core_cm85.h.
| #define ERRBNK_DEBR1_LOCKED_Pos 1U |
ERRBNK DEBR1: LOCKED Position
Definition at line 1773 of file core_cm55.h.
| #define ERRBNK_DEBR1_LOCKED_Pos 1U |
ERRBNK DEBR1: LOCKED Position
Definition at line 1760 of file core_cm85.h.
| #define ERRBNK_DEBR1_SWDEF_Msk (0x3UL << ERRBNK_DEBR1_SWDEF_Pos) |
ERRBNK DEBR1: SWDEF Mask
Definition at line 1762 of file core_cm55.h.
| #define ERRBNK_DEBR1_SWDEF_Msk (0x3UL << ERRBNK_DEBR1_SWDEF_Pos) |
ERRBNK DEBR1: SWDEF Mask
Definition at line 1749 of file core_cm85.h.
| #define ERRBNK_DEBR1_SWDEF_Pos 30U |
ERRBNK DEBR1: SWDEF Position
Definition at line 1761 of file core_cm55.h.
| #define ERRBNK_DEBR1_SWDEF_Pos 30U |
ERRBNK DEBR1: SWDEF Position
Definition at line 1748 of file core_cm85.h.
| #define ERRBNK_DEBR1_TYPE_Msk (0x1UL << ERRBNK_DEBR1_TYPE_Pos) |
ERRBNK DEBR1: TYPE Mask
Definition at line 1765 of file core_cm55.h.
| #define ERRBNK_DEBR1_TYPE_Msk (0x1UL << ERRBNK_DEBR1_TYPE_Pos) |
ERRBNK DEBR1: TYPE Mask
Definition at line 1752 of file core_cm85.h.
| #define ERRBNK_DEBR1_TYPE_Pos 17U |
ERRBNK DEBR1: TYPE Position
Definition at line 1764 of file core_cm55.h.
| #define ERRBNK_DEBR1_TYPE_Pos 17U |
ERRBNK DEBR1: TYPE Position
Definition at line 1751 of file core_cm85.h.
| #define ERRBNK_DEBR1_VALID_Msk (0x1UL << /*ERRBNK_DEBR1_VALID_Pos*/) |
ERRBNK DEBR1: VALID Mask
Definition at line 1777 of file core_cm55.h.
| #define ERRBNK_DEBR1_VALID_Msk (0x1UL << /*ERRBNK_DEBR1_VALID_Pos*/) |
ERRBNK DEBR1: VALID Mask
Definition at line 1764 of file core_cm85.h.
| #define ERRBNK_DEBR1_VALID_Pos 0U |
ERRBNK DEBR1: VALID Position
Definition at line 1776 of file core_cm55.h.
| #define ERRBNK_DEBR1_VALID_Pos 0U |
ERRBNK DEBR1: VALID Position
Definition at line 1763 of file core_cm85.h.
| #define ERRBNK_IEBR0_BANK_Msk (0x1UL << ERRBNK_IEBR0_BANK_Pos) |
ERRBNK IEBR0: BANK Mask
Definition at line 1714 of file core_cm55.h.
| #define ERRBNK_IEBR0_BANK_Msk (0x1UL << ERRBNK_IEBR0_BANK_Pos) |
ERRBNK IEBR0: BANK Mask
Definition at line 1701 of file core_cm85.h.
| #define ERRBNK_IEBR0_BANK_Pos 16U |
ERRBNK IEBR0: BANK Position
Definition at line 1713 of file core_cm55.h.
| #define ERRBNK_IEBR0_BANK_Pos 16U |
ERRBNK IEBR0: BANK Position
Definition at line 1700 of file core_cm85.h.
| #define ERRBNK_IEBR0_LOCATION_Msk (0x3FFFUL << ERRBNK_IEBR0_LOCATION_Pos) |
ERRBNK IEBR0: LOCATION Mask
Definition at line 1717 of file core_cm55.h.
| #define ERRBNK_IEBR0_LOCATION_Msk (0x3FFFUL << ERRBNK_IEBR0_LOCATION_Pos) |
ERRBNK IEBR0: LOCATION Mask
Definition at line 1704 of file core_cm85.h.
| #define ERRBNK_IEBR0_LOCATION_Pos 2U |
ERRBNK IEBR0: LOCATION Position
Definition at line 1716 of file core_cm55.h.
| #define ERRBNK_IEBR0_LOCATION_Pos 2U |
ERRBNK IEBR0: LOCATION Position
Definition at line 1703 of file core_cm85.h.
| #define ERRBNK_IEBR0_LOCKED_Msk (0x1UL << ERRBNK_IEBR0_LOCKED_Pos) |
ERRBNK IEBR0: LOCKED Mask
Definition at line 1720 of file core_cm55.h.
| #define ERRBNK_IEBR0_LOCKED_Msk (0x1UL << ERRBNK_IEBR0_LOCKED_Pos) |
ERRBNK IEBR0: LOCKED Mask
Definition at line 1707 of file core_cm85.h.
| #define ERRBNK_IEBR0_LOCKED_Pos 1U |
ERRBNK IEBR0: LOCKED Position
Definition at line 1719 of file core_cm55.h.
| #define ERRBNK_IEBR0_LOCKED_Pos 1U |
ERRBNK IEBR0: LOCKED Position
Definition at line 1706 of file core_cm85.h.
| #define ERRBNK_IEBR0_SWDEF_Msk (0x3UL << ERRBNK_IEBR0_SWDEF_Pos) |
ERRBNK IEBR0: SWDEF Mask
Definition at line 1711 of file core_cm55.h.
| #define ERRBNK_IEBR0_SWDEF_Msk (0x3UL << ERRBNK_IEBR0_SWDEF_Pos) |
ERRBNK IEBR0: SWDEF Mask
Definition at line 1698 of file core_cm85.h.
| #define ERRBNK_IEBR0_SWDEF_Pos 30U |
ERRBNK IEBR0: SWDEF Position
Definition at line 1710 of file core_cm55.h.
| #define ERRBNK_IEBR0_SWDEF_Pos 30U |
ERRBNK IEBR0: SWDEF Position
Definition at line 1697 of file core_cm85.h.
| #define ERRBNK_IEBR0_VALID_Msk (0x1UL << /*ERRBNK_IEBR0_VALID_Pos*/) |
ERRBNK IEBR0: VALID Mask
Definition at line 1723 of file core_cm55.h.
| #define ERRBNK_IEBR0_VALID_Msk (0x1UL << /*ERRBNK_IEBR0_VALID_Pos*/) |
ERRBNK IEBR0: VALID Mask
Definition at line 1710 of file core_cm85.h.
| #define ERRBNK_IEBR0_VALID_Pos 0U |
ERRBNK IEBR0: VALID Position
Definition at line 1722 of file core_cm55.h.
| #define ERRBNK_IEBR0_VALID_Pos 0U |
ERRBNK IEBR0: VALID Position
Definition at line 1709 of file core_cm85.h.
| #define ERRBNK_IEBR1_BANK_Msk (0x1UL << ERRBNK_IEBR1_BANK_Pos) |
ERRBNK IEBR1: BANK Mask
Definition at line 1730 of file core_cm55.h.
| #define ERRBNK_IEBR1_BANK_Msk (0x1UL << ERRBNK_IEBR1_BANK_Pos) |
ERRBNK IEBR1: BANK Mask
Definition at line 1717 of file core_cm85.h.
| #define ERRBNK_IEBR1_BANK_Pos 16U |
ERRBNK IEBR1: BANK Position
Definition at line 1729 of file core_cm55.h.
| #define ERRBNK_IEBR1_BANK_Pos 16U |
ERRBNK IEBR1: BANK Position
Definition at line 1716 of file core_cm85.h.
| #define ERRBNK_IEBR1_LOCATION_Msk (0x3FFFUL << ERRBNK_IEBR1_LOCATION_Pos) |
ERRBNK IEBR1: LOCATION Mask
Definition at line 1733 of file core_cm55.h.
| #define ERRBNK_IEBR1_LOCATION_Msk (0x3FFFUL << ERRBNK_IEBR1_LOCATION_Pos) |
ERRBNK IEBR1: LOCATION Mask
Definition at line 1720 of file core_cm85.h.
| #define ERRBNK_IEBR1_LOCATION_Pos 2U |
ERRBNK IEBR1: LOCATION Position
Definition at line 1732 of file core_cm55.h.
| #define ERRBNK_IEBR1_LOCATION_Pos 2U |
ERRBNK IEBR1: LOCATION Position
Definition at line 1719 of file core_cm85.h.
| #define ERRBNK_IEBR1_LOCKED_Msk (0x1UL << ERRBNK_IEBR1_LOCKED_Pos) |
ERRBNK IEBR1: LOCKED Mask
Definition at line 1736 of file core_cm55.h.
| #define ERRBNK_IEBR1_LOCKED_Msk (0x1UL << ERRBNK_IEBR1_LOCKED_Pos) |
ERRBNK IEBR1: LOCKED Mask
Definition at line 1723 of file core_cm85.h.
| #define ERRBNK_IEBR1_LOCKED_Pos 1U |
ERRBNK IEBR1: LOCKED Position
Definition at line 1735 of file core_cm55.h.
| #define ERRBNK_IEBR1_LOCKED_Pos 1U |
ERRBNK IEBR1: LOCKED Position
Definition at line 1722 of file core_cm85.h.
| #define ERRBNK_IEBR1_SWDEF_Msk (0x3UL << ERRBNK_IEBR1_SWDEF_Pos) |
ERRBNK IEBR1: SWDEF Mask
Definition at line 1727 of file core_cm55.h.
| #define ERRBNK_IEBR1_SWDEF_Msk (0x3UL << ERRBNK_IEBR1_SWDEF_Pos) |
ERRBNK IEBR1: SWDEF Mask
Definition at line 1714 of file core_cm85.h.
| #define ERRBNK_IEBR1_SWDEF_Pos 30U |
ERRBNK IEBR1: SWDEF Position
Definition at line 1726 of file core_cm55.h.
| #define ERRBNK_IEBR1_SWDEF_Pos 30U |
ERRBNK IEBR1: SWDEF Position
Definition at line 1713 of file core_cm85.h.
| #define ERRBNK_IEBR1_VALID_Msk (0x1UL << /*ERRBNK_IEBR1_VALID_Pos*/) |
ERRBNK IEBR1: VALID Mask
Definition at line 1739 of file core_cm55.h.
| #define ERRBNK_IEBR1_VALID_Msk (0x1UL << /*ERRBNK_IEBR1_VALID_Pos*/) |
ERRBNK IEBR1: VALID Mask
Definition at line 1726 of file core_cm85.h.
| #define ERRBNK_IEBR1_VALID_Pos 0U |
ERRBNK IEBR1: VALID Position
Definition at line 1738 of file core_cm55.h.
| #define ERRBNK_IEBR1_VALID_Pos 0U |
ERRBNK IEBR1: VALID Position
Definition at line 1725 of file core_cm85.h.
| #define ERRBNK_TEBR0_BANK_Msk (0x7UL << ERRBNK_TEBR0_BANK_Pos) |
ERRBNK TEBR0: BANK Mask
Definition at line 1790 of file core_cm55.h.
| #define ERRBNK_TEBR0_BANK_Msk (0x7UL << ERRBNK_TEBR0_BANK_Pos) |
ERRBNK TEBR0: BANK Mask
Definition at line 1777 of file core_cm85.h.
| #define ERRBNK_TEBR0_BANK_Pos 24U |
ERRBNK TEBR0: BANK Position
Definition at line 1789 of file core_cm55.h.
| #define ERRBNK_TEBR0_BANK_Pos 24U |
ERRBNK TEBR0: BANK Position
Definition at line 1776 of file core_cm85.h.
| #define ERRBNK_TEBR0_LOCATION_Msk (0x3FFFFFUL << ERRBNK_TEBR0_LOCATION_Pos) |
ERRBNK TEBR0: LOCATION Mask
Definition at line 1793 of file core_cm55.h.
| #define ERRBNK_TEBR0_LOCATION_Msk (0x3FFFFFUL << ERRBNK_TEBR0_LOCATION_Pos) |
ERRBNK TEBR0: LOCATION Mask
Definition at line 1780 of file core_cm85.h.
| #define ERRBNK_TEBR0_LOCATION_Pos 2U |
ERRBNK TEBR0: LOCATION Position
Definition at line 1792 of file core_cm55.h.
| #define ERRBNK_TEBR0_LOCATION_Pos 2U |
ERRBNK TEBR0: LOCATION Position
Definition at line 1779 of file core_cm85.h.
| #define ERRBNK_TEBR0_LOCKED_Msk (0x1UL << ERRBNK_TEBR0_LOCKED_Pos) |
ERRBNK TEBR0: LOCKED Mask
Definition at line 1796 of file core_cm55.h.
| #define ERRBNK_TEBR0_LOCKED_Msk (0x1UL << ERRBNK_TEBR0_LOCKED_Pos) |
ERRBNK TEBR0: LOCKED Mask
Definition at line 1783 of file core_cm85.h.
| #define ERRBNK_TEBR0_LOCKED_Pos 1U |
ERRBNK TEBR0: LOCKED Position
Definition at line 1795 of file core_cm55.h.
| #define ERRBNK_TEBR0_LOCKED_Pos 1U |
ERRBNK TEBR0: LOCKED Position
Definition at line 1782 of file core_cm85.h.
| #define ERRBNK_TEBR0_POISON_Msk (0x1UL << ERRBNK_TEBR0_POISON_Pos) |
ERRBNK TEBR0: POISON Mask
Definition at line 1784 of file core_cm55.h.
| #define ERRBNK_TEBR0_POISON_Msk (0x1UL << ERRBNK_TEBR0_POISON_Pos) |
ERRBNK TEBR0: POISON Mask
Definition at line 1771 of file core_cm85.h.
| #define ERRBNK_TEBR0_POISON_Pos 28U |
ERRBNK TEBR0: POISON Position
Definition at line 1783 of file core_cm55.h.
| #define ERRBNK_TEBR0_POISON_Pos 28U |
ERRBNK TEBR0: POISON Position
Definition at line 1770 of file core_cm85.h.
| #define ERRBNK_TEBR0_SWDEF_Msk (0x3UL << ERRBNK_TEBR0_SWDEF_Pos) |
ERRBNK TEBR0: SWDEF Mask
Definition at line 1781 of file core_cm55.h.
| #define ERRBNK_TEBR0_SWDEF_Msk (0x3UL << ERRBNK_TEBR0_SWDEF_Pos) |
ERRBNK TEBR0: SWDEF Mask
Definition at line 1768 of file core_cm85.h.
| #define ERRBNK_TEBR0_SWDEF_Pos 30U |
ERRBNK TEBR0: SWDEF Position
Definition at line 1780 of file core_cm55.h.
| #define ERRBNK_TEBR0_SWDEF_Pos 30U |
ERRBNK TEBR0: SWDEF Position
Definition at line 1767 of file core_cm85.h.
| #define ERRBNK_TEBR0_TYPE_Msk (0x1UL << ERRBNK_TEBR0_TYPE_Pos) |
ERRBNK TEBR0: TYPE Mask
Definition at line 1787 of file core_cm55.h.
| #define ERRBNK_TEBR0_TYPE_Msk (0x1UL << ERRBNK_TEBR0_TYPE_Pos) |
ERRBNK TEBR0: TYPE Mask
Definition at line 1774 of file core_cm85.h.
| #define ERRBNK_TEBR0_TYPE_Pos 27U |
ERRBNK TEBR0: TYPE Position
Definition at line 1786 of file core_cm55.h.
| #define ERRBNK_TEBR0_TYPE_Pos 27U |
ERRBNK TEBR0: TYPE Position
Definition at line 1773 of file core_cm85.h.
| #define ERRBNK_TEBR0_VALID_Msk (0x1UL << /*ERRBNK_TEBR0_VALID_Pos*/) |
ERRBNK TEBR0: VALID Mask
Definition at line 1799 of file core_cm55.h.
| #define ERRBNK_TEBR0_VALID_Msk (0x1UL << /*ERRBNK_TEBR0_VALID_Pos*/) |
ERRBNK TEBR0: VALID Mask
Definition at line 1786 of file core_cm85.h.
| #define ERRBNK_TEBR0_VALID_Pos 0U |
ERRBNK TEBR0: VALID Position
Definition at line 1798 of file core_cm55.h.
| #define ERRBNK_TEBR0_VALID_Pos 0U |
ERRBNK TEBR0: VALID Position
Definition at line 1785 of file core_cm85.h.
| #define ERRBNK_TEBR1_BANK_Msk (0x7UL << ERRBNK_TEBR1_BANK_Pos) |
ERRBNK TEBR1: BANK Mask
Definition at line 1812 of file core_cm55.h.
| #define ERRBNK_TEBR1_BANK_Msk (0x7UL << ERRBNK_TEBR1_BANK_Pos) |
ERRBNK TEBR1: BANK Mask
Definition at line 1799 of file core_cm85.h.
| #define ERRBNK_TEBR1_BANK_Pos 24U |
ERRBNK TEBR1: BANK Position
Definition at line 1811 of file core_cm55.h.
| #define ERRBNK_TEBR1_BANK_Pos 24U |
ERRBNK TEBR1: BANK Position
Definition at line 1798 of file core_cm85.h.
| #define ERRBNK_TEBR1_LOCATION_Msk (0x3FFFFFUL << ERRBNK_TEBR1_LOCATION_Pos) |
ERRBNK TEBR1: LOCATION Mask
Definition at line 1815 of file core_cm55.h.
| #define ERRBNK_TEBR1_LOCATION_Msk (0x3FFFFFUL << ERRBNK_TEBR1_LOCATION_Pos) |
ERRBNK TEBR1: LOCATION Mask
Definition at line 1802 of file core_cm85.h.
| #define ERRBNK_TEBR1_LOCATION_Pos 2U |
ERRBNK TEBR1: LOCATION Position
Definition at line 1814 of file core_cm55.h.
| #define ERRBNK_TEBR1_LOCATION_Pos 2U |
ERRBNK TEBR1: LOCATION Position
Definition at line 1801 of file core_cm85.h.
| #define ERRBNK_TEBR1_LOCKED_Msk (0x1UL << ERRBNK_TEBR1_LOCKED_Pos) |
ERRBNK TEBR1: LOCKED Mask
Definition at line 1818 of file core_cm55.h.
| #define ERRBNK_TEBR1_LOCKED_Msk (0x1UL << ERRBNK_TEBR1_LOCKED_Pos) |
ERRBNK TEBR1: LOCKED Mask
Definition at line 1805 of file core_cm85.h.
| #define ERRBNK_TEBR1_LOCKED_Pos 1U |
ERRBNK TEBR1: LOCKED Position
Definition at line 1817 of file core_cm55.h.
| #define ERRBNK_TEBR1_LOCKED_Pos 1U |
ERRBNK TEBR1: LOCKED Position
Definition at line 1804 of file core_cm85.h.
| #define ERRBNK_TEBR1_POISON_Msk (0x1UL << ERRBNK_TEBR1_POISON_Pos) |
ERRBNK TEBR1: POISON Mask
Definition at line 1806 of file core_cm55.h.
| #define ERRBNK_TEBR1_POISON_Msk (0x1UL << ERRBNK_TEBR1_POISON_Pos) |
ERRBNK TEBR1: POISON Mask
Definition at line 1793 of file core_cm85.h.
| #define ERRBNK_TEBR1_POISON_Pos 28U |
ERRBNK TEBR1: POISON Position
Definition at line 1805 of file core_cm55.h.
| #define ERRBNK_TEBR1_POISON_Pos 28U |
ERRBNK TEBR1: POISON Position
Definition at line 1792 of file core_cm85.h.
| #define ERRBNK_TEBR1_SWDEF_Msk (0x3UL << ERRBNK_TEBR1_SWDEF_Pos) |
ERRBNK TEBR1: SWDEF Mask
Definition at line 1803 of file core_cm55.h.
| #define ERRBNK_TEBR1_SWDEF_Msk (0x3UL << ERRBNK_TEBR1_SWDEF_Pos) |
ERRBNK TEBR1: SWDEF Mask
Definition at line 1790 of file core_cm85.h.
| #define ERRBNK_TEBR1_SWDEF_Pos 30U |
ERRBNK TEBR1: SWDEF Position
Definition at line 1802 of file core_cm55.h.
| #define ERRBNK_TEBR1_SWDEF_Pos 30U |
ERRBNK TEBR1: SWDEF Position
Definition at line 1789 of file core_cm85.h.
| #define ERRBNK_TEBR1_TYPE_Msk (0x1UL << ERRBNK_TEBR1_TYPE_Pos) |
ERRBNK TEBR1: TYPE Mask
Definition at line 1809 of file core_cm55.h.
| #define ERRBNK_TEBR1_TYPE_Msk (0x1UL << ERRBNK_TEBR1_TYPE_Pos) |
ERRBNK TEBR1: TYPE Mask
Definition at line 1796 of file core_cm85.h.
| #define ERRBNK_TEBR1_TYPE_Pos 27U |
ERRBNK TEBR1: TYPE Position
Definition at line 1808 of file core_cm55.h.
| #define ERRBNK_TEBR1_TYPE_Pos 27U |
ERRBNK TEBR1: TYPE Position
Definition at line 1795 of file core_cm85.h.
| #define ERRBNK_TEBR1_VALID_Msk (0x1UL << /*ERRBNK_TEBR1_VALID_Pos*/) |
ERRBNK TEBR1: VALID Mask
Definition at line 1821 of file core_cm55.h.
| #define ERRBNK_TEBR1_VALID_Msk (0x1UL << /*ERRBNK_TEBR1_VALID_Pos*/) |
ERRBNK TEBR1: VALID Mask
Definition at line 1808 of file core_cm85.h.
| #define ERRBNK_TEBR1_VALID_Pos 0U |
ERRBNK TEBR1: VALID Position
Definition at line 1820 of file core_cm55.h.
| #define ERRBNK_TEBR1_VALID_Pos 0U |
ERRBNK TEBR1: VALID Position
Definition at line 1807 of file core_cm85.h.