Functions that configure the System. More...

Topics
	ITM Functions
	Functions that access the ITM debug interface.

Variables
uint32_t APSR_Type::_reserved0:28

uint32_t APSR_Type::V:1

uint32_t APSR_Type::C:1

uint32_t APSR_Type::Z:1

uint32_t APSR_Type::N:1

struct {

uint32_t APSR_Type::_reserved0:28

uint32_t APSR_Type::V:1

uint32_t APSR_Type::C:1

uint32_t APSR_Type::Z:1

uint32_t APSR_Type::N:1

}	APSR_Type::b

uint32_t IPSR_Type::ISR:9

uint32_t IPSR_Type::_reserved0:23

struct {

uint32_t IPSR_Type::ISR:9

uint32_t IPSR_Type::_reserved0:23

}	IPSR_Type::b

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	xPSR_Type::b

uint32_t CONTROL_Type::nPRIV:1

uint32_t CONTROL_Type::SPSEL:1

uint32_t CONTROL_Type::_reserved1:30

struct {

uint32_t CONTROL_Type::nPRIV:1

uint32_t CONTROL_Type::SPSEL:1

uint32_t CONTROL_Type::_reserved1:30

}	CONTROL_Type::b

__IOM uint32_t	NVIC_Type::IPR [124U]

uint32_t	SCB_Type::RESERVED0

uint32_t	SCB_Type::RESERVED1

__IOM uint32_t	SCB_Type::SHPR [2U]

uint32_t	DWT_Type::RESERVED0 [6U]

uint32_t	CoreDebug_Type::RESERVED0 [1U]

uint32_t	DCB_Type::RESERVED0 [1U]

uint32_t APSR_Type::_reserved0:28

uint32_t APSR_Type::V:1

uint32_t APSR_Type::C:1

uint32_t APSR_Type::Z:1

uint32_t APSR_Type::N:1

struct {

uint32_t APSR_Type::_reserved0:28

uint32_t APSR_Type::V:1

uint32_t APSR_Type::C:1

uint32_t APSR_Type::Z:1

uint32_t APSR_Type::N:1

}	APSR_Type::b

uint32_t IPSR_Type::ISR:9

uint32_t IPSR_Type::_reserved0:23

struct {

uint32_t IPSR_Type::ISR:9

uint32_t IPSR_Type::_reserved0:23

}	IPSR_Type::b

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	xPSR_Type::b

uint32_t CONTROL_Type::_reserved0:1

uint32_t CONTROL_Type::SPSEL:1

uint32_t CONTROL_Type::_reserved1:30

struct {

uint32_t CONTROL_Type::_reserved0:1

uint32_t CONTROL_Type::SPSEL:1

uint32_t CONTROL_Type::_reserved1:30

}	CONTROL_Type::b

uint32_t	NVIC_Type::RESERVED1 [31U]

__IOM uint32_t	NVIC_Type::IP [8U]

__IOM uint32_t	SCB_Type::SHP [2U]

uint32_t APSR_Type::_reserved0:28

uint32_t APSR_Type::V:1

uint32_t APSR_Type::C:1

uint32_t APSR_Type::Z:1

uint32_t APSR_Type::N:1

struct {

uint32_t APSR_Type::_reserved0:28

uint32_t APSR_Type::V:1

uint32_t APSR_Type::C:1

uint32_t APSR_Type::Z:1

uint32_t APSR_Type::N:1

}	APSR_Type::b

uint32_t IPSR_Type::ISR:9

uint32_t IPSR_Type::_reserved0:23

struct {

uint32_t IPSR_Type::ISR:9

uint32_t IPSR_Type::_reserved0:23

}	IPSR_Type::b

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	xPSR_Type::b

uint32_t CONTROL_Type::nPRIV:1

uint32_t CONTROL_Type::SPSEL:1

uint32_t CONTROL_Type::_reserved1:30

struct {

uint32_t CONTROL_Type::nPRIV:1

uint32_t CONTROL_Type::SPSEL:1

uint32_t CONTROL_Type::_reserved1:30

}	CONTROL_Type::b

uint32_t APSR_Type::_reserved0:28

uint32_t APSR_Type::V:1

uint32_t APSR_Type::C:1

uint32_t APSR_Type::Z:1

uint32_t APSR_Type::N:1

struct {

uint32_t APSR_Type::_reserved0:28

uint32_t APSR_Type::V:1

uint32_t APSR_Type::C:1

uint32_t APSR_Type::Z:1

uint32_t APSR_Type::N:1

}	APSR_Type::b

uint32_t IPSR_Type::ISR:9

uint32_t IPSR_Type::_reserved0:23

struct {

uint32_t IPSR_Type::ISR:9

uint32_t IPSR_Type::_reserved0:23

}	IPSR_Type::b

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	xPSR_Type::b

uint32_t CONTROL_Type::_reserved0:1

uint32_t CONTROL_Type::SPSEL:1

uint32_t CONTROL_Type::_reserved1:30

struct {

uint32_t CONTROL_Type::_reserved0:1

uint32_t CONTROL_Type::SPSEL:1

uint32_t CONTROL_Type::_reserved1:30

}	CONTROL_Type::b

uint32_t APSR_Type::_reserved0:28

uint32_t APSR_Type::V:1

uint32_t APSR_Type::C:1

uint32_t APSR_Type::Z:1

uint32_t APSR_Type::N:1

struct {

uint32_t APSR_Type::_reserved0:28

uint32_t APSR_Type::V:1

uint32_t APSR_Type::C:1

uint32_t APSR_Type::Z:1

uint32_t APSR_Type::N:1

}	APSR_Type::b

uint32_t IPSR_Type::ISR:9

uint32_t IPSR_Type::_reserved0:23

struct {

uint32_t IPSR_Type::ISR:9

uint32_t IPSR_Type::_reserved0:23

}	IPSR_Type::b

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	xPSR_Type::b

uint32_t CONTROL_Type::nPRIV:1

uint32_t CONTROL_Type::SPSEL:1

uint32_t CONTROL_Type::_reserved1:30

struct {

uint32_t CONTROL_Type::nPRIV:1

uint32_t CONTROL_Type::SPSEL:1

uint32_t CONTROL_Type::_reserved1:30

}	CONTROL_Type::b

__IM uint32_t	TPI_Type::TRIGGER

__IM uint32_t	TPI_Type::ITFTTD0

__IOM uint32_t	TPI_Type::ITATBCTR2

__IM uint32_t	TPI_Type::ITATBCTR0

__IM uint32_t	TPI_Type::ITFTTD1

__IOM uint32_t	TPI_Type::ITCTRL

uint32_t	TPI_Type::RESERVED5 [39U]

__IOM uint32_t	TPI_Type::CLAIMSET

__IOM uint32_t	TPI_Type::CLAIMCLR

uint32_t	TPI_Type::RESERVED7 [8U]

__IM uint32_t	TPI_Type::DEVID

uint32_t APSR_Type::_reserved0:28

uint32_t APSR_Type::V:1

uint32_t APSR_Type::C:1

uint32_t APSR_Type::Z:1

uint32_t APSR_Type::N:1

struct {

uint32_t APSR_Type::_reserved0:28

uint32_t APSR_Type::V:1

uint32_t APSR_Type::C:1

uint32_t APSR_Type::Z:1

uint32_t APSR_Type::N:1

}	APSR_Type::b

uint32_t IPSR_Type::ISR:9

uint32_t IPSR_Type::_reserved0:23

struct {

uint32_t IPSR_Type::ISR:9

uint32_t IPSR_Type::_reserved0:23

}	IPSR_Type::b

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	xPSR_Type::b

uint32_t CONTROL_Type::_reserved0:1

uint32_t CONTROL_Type::SPSEL:1

uint32_t CONTROL_Type::_reserved1:30

struct {

uint32_t CONTROL_Type::_reserved0:1

uint32_t CONTROL_Type::SPSEL:1

uint32_t CONTROL_Type::_reserved1:30

}	CONTROL_Type::b

__IOM uint32_t	SCB_Type::SFCR

uint32_t APSR_Type::_reserved0:28

uint32_t APSR_Type::V:1

uint32_t APSR_Type::C:1

uint32_t APSR_Type::Z:1

uint32_t APSR_Type::N:1

struct {

uint32_t APSR_Type::_reserved0:28

uint32_t APSR_Type::V:1

uint32_t APSR_Type::C:1

uint32_t APSR_Type::Z:1

uint32_t APSR_Type::N:1

}	APSR_Type::b

uint32_t IPSR_Type::ISR:9

uint32_t IPSR_Type::_reserved0:23

struct {

uint32_t IPSR_Type::ISR:9

uint32_t IPSR_Type::_reserved0:23

}	IPSR_Type::b

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	xPSR_Type::b

uint32_t CONTROL_Type::_reserved0:1

uint32_t CONTROL_Type::SPSEL:1

uint32_t CONTROL_Type::_reserved1:30

struct {

uint32_t CONTROL_Type::_reserved0:1

uint32_t CONTROL_Type::SPSEL:1

uint32_t CONTROL_Type::_reserved1:30

}	CONTROL_Type::b

uint32_t APSR_Type::_reserved0:28

uint32_t APSR_Type::V:1

uint32_t APSR_Type::C:1

uint32_t APSR_Type::Z:1

uint32_t APSR_Type::N:1

struct {

uint32_t APSR_Type::_reserved0:28

uint32_t APSR_Type::V:1

uint32_t APSR_Type::C:1

uint32_t APSR_Type::Z:1

uint32_t APSR_Type::N:1

}	APSR_Type::b

uint32_t IPSR_Type::ISR:9

uint32_t IPSR_Type::_reserved0:23

struct {

uint32_t IPSR_Type::ISR:9

uint32_t IPSR_Type::_reserved0:23

}	IPSR_Type::b

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	xPSR_Type::b

uint32_t CONTROL_Type::nPRIV:1

uint32_t CONTROL_Type::SPSEL:1

uint32_t CONTROL_Type::_reserved1:30

struct {

uint32_t CONTROL_Type::nPRIV:1

uint32_t CONTROL_Type::SPSEL:1

uint32_t CONTROL_Type::_reserved1:30

}	CONTROL_Type::b

uint32_t APSR_Type::_reserved0:28

uint32_t APSR_Type::V:1

uint32_t APSR_Type::C:1

uint32_t APSR_Type::Z:1

uint32_t APSR_Type::N:1

struct {

uint32_t APSR_Type::_reserved0:28

uint32_t APSR_Type::V:1

uint32_t APSR_Type::C:1

uint32_t APSR_Type::Z:1

uint32_t APSR_Type::N:1

}	APSR_Type::b

uint32_t IPSR_Type::ISR:9

uint32_t IPSR_Type::_reserved0:23

struct {

uint32_t IPSR_Type::ISR:9

uint32_t IPSR_Type::_reserved0:23

}	IPSR_Type::b

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	xPSR_Type::b

uint32_t CONTROL_Type::nPRIV:1

uint32_t CONTROL_Type::SPSEL:1

uint32_t CONTROL_Type::_reserved1:30

struct {

uint32_t CONTROL_Type::nPRIV:1

uint32_t CONTROL_Type::SPSEL:1

uint32_t CONTROL_Type::_reserved1:30

}	CONTROL_Type::b

Detailed Description

Functions that configure the System.

Variable Documentation

◆ [] [1/32]

uint32_t { ... } ::_reserved0

bit: 0..27 Reserved

Definition at line 208 of file core_cm0.h.

◆ [] [2/32]

uint32_t { ... } ::_reserved0

bit: 0..27 Reserved

Definition at line 219 of file core_cm0plus.h.

◆ [] [3/32]

uint32_t { ... } ::_reserved0

bit: 0..27 Reserved

Definition at line 208 of file core_cm1.h.

◆ [] [4/32]

uint32_t { ... } ::_reserved0

bit: 0..27 Reserved

Definition at line 244 of file core_cm23.h.

◆ [] [5/32]

uint32_t { ... } ::_reserved0

bit: 0..27 Reserved

Definition at line 244 of file core_armv8mbl.h.

◆ [] [6/32]

uint32_t { ... } ::_reserved0

bit: 0..27 Reserved

Definition at line 219 of file core_sc000.h.

◆ [] [7/32]

uint32_t { ... } ::_reserved0

bit: 0..27 Reserved

Definition at line 208 of file core_cm0.h.

◆ [] [8/32]

uint32_t { ... } ::_reserved0

bit: 0..27 Reserved

Definition at line 219 of file core_cm0plus.h.

◆ [] [9/32]

uint32_t { ... } ::_reserved0

bit: 0..27 Reserved

Definition at line 244 of file core_armv8mbl.h.

◆ [] [10/32]

uint32_t { ... } ::_reserved0

bit: 0 Reserved

Definition at line 295 of file core_cm0.h.

◆ [] [11/32]

uint32_t { ... } ::_reserved0

bit: 0 Reserved

Definition at line 295 of file core_cm1.h.

◆ [] [12/32]

uint32_t { ... } ::_reserved0

bit: 0 Reserved

Definition at line 306 of file core_sc000.h.

◆ [] [13/32]

uint32_t { ... } ::_reserved0

bit: 0 Reserved

Definition at line 295 of file core_cm0.h.

◆ _reserved0 [14/32]

uint32_t CONTROL_Type::_reserved0

bit: 0 Reserved

bit: 3..31 Reserved

Definition at line 295 of file core_cm0.h.

◆ [] [15/32]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 239 of file core_cm0.h.

◆ [] [16/32]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 250 of file core_cm0plus.h.

◆ [] [17/32]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 239 of file core_cm1.h.

◆ [] [18/32]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 275 of file core_cm23.h.

◆ [] [19/32]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 250 of file core_sc000.h.

◆ [] [20/32]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 275 of file core_armv8mbl.h.

◆ [] [21/32]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 239 of file core_cm0.h.

◆ [] [22/32]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 250 of file core_cm0plus.h.

◆ [] [23/32]

uint32_t { ... } ::_reserved0

bit: 9..31 Reserved

Definition at line 275 of file core_armv8mbl.h.

◆ [] [24/32]

uint32_t { ... } ::_reserved0

bit: 9..23 Reserved

Definition at line 257 of file core_cm0.h.

◆ [] [25/32]

uint32_t { ... } ::_reserved0

bit: 9..23 Reserved

Definition at line 268 of file core_cm0plus.h.

◆ [] [26/32]

uint32_t { ... } ::_reserved0

bit: 9..23 Reserved

Definition at line 257 of file core_cm1.h.

◆ [] [27/32]

uint32_t { ... } ::_reserved0

bit: 9..23 Reserved

Definition at line 293 of file core_cm23.h.

◆ [] [28/32]

uint32_t { ... } ::_reserved0

bit: 9..23 Reserved

Definition at line 268 of file core_sc000.h.

◆ [] [29/32]

uint32_t { ... } ::_reserved0

bit: 9..23 Reserved

Definition at line 293 of file core_armv8mbl.h.

◆ [] [30/32]

uint32_t { ... } ::_reserved0

bit: 9..23 Reserved

Definition at line 257 of file core_cm0.h.

◆ [] [31/32]

uint32_t { ... } ::_reserved0

bit: 9..23 Reserved

Definition at line 268 of file core_cm0plus.h.

◆ [] [32/32]

uint32_t { ... } ::_reserved0

bit: 9..23 Reserved

Definition at line 293 of file core_armv8mbl.h.

◆ [] [1/18]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 297 of file core_cm0.h.

◆ [] [2/18]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 308 of file core_cm0plus.h.

◆ [] [3/18]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 297 of file core_cm1.h.

◆ [] [4/18]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 333 of file core_cm23.h.

◆ [] [5/18]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 308 of file core_sc000.h.

◆ [] [6/18]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 297 of file core_cm0.h.

◆ [] [7/18]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 308 of file core_cm0plus.h.

◆ [] [8/18]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 333 of file core_armv8mbl.h.

◆ [] [9/18]

uint32_t { ... } ::_reserved1

bit: 2..31 Reserved

Definition at line 333 of file core_armv8mbl.h.

◆ [] [10/18]

uint32_t { ... } ::_reserved1

bit: 25..27 Reserved

Definition at line 259 of file core_cm0.h.

◆ [] [11/18]

uint32_t { ... } ::_reserved1

bit: 25..27 Reserved

Definition at line 270 of file core_cm0plus.h.

◆ [] [12/18]

uint32_t { ... } ::_reserved1

bit: 25..27 Reserved

Definition at line 259 of file core_cm1.h.

◆ [] [13/18]

uint32_t { ... } ::_reserved1

bit: 25..27 Reserved

Definition at line 295 of file core_cm23.h.

◆ [] [14/18]

uint32_t { ... } ::_reserved1

bit: 25..27 Reserved

Definition at line 270 of file core_sc000.h.

◆ [] [15/18]

uint32_t { ... } ::_reserved1

bit: 25..27 Reserved

Definition at line 295 of file core_armv8mbl.h.

◆ [] [16/18]

uint32_t { ... } ::_reserved1

bit: 25..27 Reserved

Definition at line 259 of file core_cm0.h.

◆ [] [17/18]

uint32_t { ... } ::_reserved1

bit: 25..27 Reserved

Definition at line 270 of file core_cm0plus.h.

◆ [] [18/18]

uint32_t { ... } ::_reserved1

bit: 25..27 Reserved

Definition at line 295 of file core_armv8mbl.h.

◆ [struct] [1/36]

struct { ... } APSR_Type::b

Structure used for bit access

◆ [struct] [2/36]

struct { ... } APSR_Type::b

Structure used for bit access

◆ [struct] [3/36]

struct { ... } APSR_Type::b

Structure used for bit access

◆ [struct] [4/36]

struct { ... } APSR_Type::b

Structure used for bit access

◆ [struct] [5/36]

struct { ... } APSR_Type::b

Structure used for bit access

◆ [struct] [6/36]

struct { ... } APSR_Type::b

Structure used for bit access

◆ [struct] [7/36]

struct { ... } APSR_Type::b

Structure used for bit access

◆ [struct] [8/36]

struct { ... } APSR_Type::b

Structure used for bit access

◆ [struct] [9/36]

struct { ... } APSR_Type::b

Structure used for bit access

◆ [struct] [10/36]

struct { ... } CONTROL_Type::b

Structure used for bit access

◆ [struct] [11/36]

struct { ... } CONTROL_Type::b

Structure used for bit access

◆ [struct] [12/36]

struct { ... } CONTROL_Type::b

Structure used for bit access

◆ [struct] [13/36]

struct { ... } CONTROL_Type::b

Structure used for bit access

◆ [struct] [14/36]

struct { ... } CONTROL_Type::b

Structure used for bit access

◆ [struct] [15/36]

struct { ... } CONTROL_Type::b

Structure used for bit access

◆ [struct] [16/36]

struct { ... } CONTROL_Type::b

Structure used for bit access

◆ [struct] [17/36]

struct { ... } CONTROL_Type::b

Structure used for bit access

◆ [struct] [18/36]

struct { ... } CONTROL_Type::b

Structure used for bit access

◆ [struct] [19/36]

struct { ... } IPSR_Type::b

Structure used for bit access

◆ [struct] [20/36]

struct { ... } IPSR_Type::b

Structure used for bit access

◆ [struct] [21/36]

struct { ... } IPSR_Type::b

Structure used for bit access

◆ [struct] [22/36]

struct { ... } IPSR_Type::b

Structure used for bit access

◆ [struct] [23/36]

struct { ... } IPSR_Type::b

Structure used for bit access

◆ [struct] [24/36]

struct { ... } IPSR_Type::b

Structure used for bit access

◆ [struct] [25/36]

struct { ... } IPSR_Type::b

Structure used for bit access

◆ [struct] [26/36]

struct { ... } IPSR_Type::b

Structure used for bit access

◆ [struct] [27/36]

struct { ... } IPSR_Type::b

Structure used for bit access

◆ [struct] [28/36]

struct { ... } xPSR_Type::b

Structure used for bit access

◆ [struct] [29/36]

struct { ... } xPSR_Type::b

Structure used for bit access

◆ [struct] [30/36]

struct { ... } xPSR_Type::b

Structure used for bit access

◆ [struct] [31/36]

struct { ... } xPSR_Type::b

Structure used for bit access

◆ [struct] [32/36]

struct { ... } xPSR_Type::b

Structure used for bit access

◆ [struct] [33/36]

struct { ... } xPSR_Type::b

Structure used for bit access

◆ [struct] [34/36]

struct { ... } xPSR_Type::b

Structure used for bit access

◆ [struct] [35/36]

struct { ... } xPSR_Type::b

Structure used for bit access

◆ [struct] [36/36]

struct { ... } xPSR_Type::b

Structure used for bit access

◆ [] [1/18]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 210 of file core_cm0.h.

◆ [] [2/18]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 221 of file core_cm0plus.h.

◆ [] [3/18]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 210 of file core_cm1.h.

◆ [] [4/18]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 246 of file core_cm23.h.

◆ [] [5/18]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 246 of file core_armv8mbl.h.

◆ [] [6/18]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 221 of file core_sc000.h.

◆ [] [7/18]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 210 of file core_cm0.h.

◆ [] [8/18]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 221 of file core_cm0plus.h.

◆ [] [9/18]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 246 of file core_armv8mbl.h.

◆ [] [10/18]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 261 of file core_cm0.h.

◆ [] [11/18]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 272 of file core_cm0plus.h.

◆ [] [12/18]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 261 of file core_cm1.h.

◆ [] [13/18]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 297 of file core_cm23.h.

◆ [] [14/18]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 272 of file core_sc000.h.

◆ [] [15/18]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 297 of file core_armv8mbl.h.

◆ [] [16/18]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 261 of file core_cm0.h.

◆ [] [17/18]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 272 of file core_cm0plus.h.

◆ [] [18/18]

uint32_t { ... } ::C

bit: 29 Carry condition code flag

Definition at line 297 of file core_armv8mbl.h.

◆ CLAIMCLR

__IOM uint32_t TPI_Type::CLAIMCLR

Offset: 0xFA4 (R/W) Claim tag clear

Definition at line 754 of file core_cm23.h.

◆ CLAIMSET

__IOM uint32_t TPI_Type::CLAIMSET

Offset: 0xFA0 (R/W) Claim tag set

Definition at line 753 of file core_cm23.h.

◆ DEVID

__IM uint32_t TPI_Type::DEVID

Offset: 0xFC8 (R/ ) Device Configuration Register

Offset: 0xFC8 (R/ ) TPIU_DEVID

Definition at line 756 of file core_cm23.h.

◆ IP

__IOM uint8_t NVIC_Type::IP

Offset: 0x300 (R/W) Interrupt Priority Register

Offset: 0x300 (R/W) Interrupt Priority Register (8Bit wide)

Definition at line 330 of file core_cm0.h.

◆ IPR

__IOM uint32_t NVIC_Type::IPR[124U]

Offset: 0x300 (R/W) Interrupt Priority Register

Definition at line 372 of file core_armv8mbl.h.

◆ [] [1/18]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 238 of file core_cm0.h.

◆ [] [2/18]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 249 of file core_cm0plus.h.

◆ [] [3/18]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 238 of file core_cm1.h.

◆ [] [4/18]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 274 of file core_cm23.h.

◆ [] [5/18]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 249 of file core_sc000.h.

◆ [] [6/18]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 274 of file core_armv8mbl.h.

◆ [] [7/18]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 238 of file core_cm0.h.

◆ [] [8/18]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 249 of file core_cm0plus.h.

◆ [] [9/18]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 274 of file core_armv8mbl.h.

◆ [] [10/18]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 256 of file core_cm0.h.

◆ [] [11/18]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 267 of file core_cm0plus.h.

◆ [] [12/18]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 256 of file core_cm1.h.

◆ [] [13/18]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 292 of file core_cm23.h.

◆ [] [14/18]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 267 of file core_sc000.h.

◆ [] [15/18]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 292 of file core_armv8mbl.h.

◆ [] [16/18]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 256 of file core_cm0.h.

◆ [] [17/18]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 267 of file core_cm0plus.h.

◆ [] [18/18]

uint32_t { ... } ::ISR

bit: 0.. 8 Exception number

Definition at line 292 of file core_armv8mbl.h.

◆ ITATBCTR0

__IM uint32_t TPI_Type::ITATBCTR0

Offset: 0xEF8 (R/ ) Integration Test ATB Control Register 0

Offset: 0xEF8 (R/ ) ITATBCTR0

Definition at line 749 of file core_cm23.h.

◆ ITATBCTR2

__IM uint32_t TPI_Type::ITATBCTR2

Offset: 0xEF0 (R/W) Integration Test ATB Control Register 2

Offset: 0xEF0 (R/ ) ITATBCTR2

Definition at line 747 of file core_cm23.h.

◆ ITCTRL

__IOM uint32_t TPI_Type::ITCTRL

Offset: 0xF00 (R/W) Integration Mode Control

Definition at line 751 of file core_cm23.h.

◆ ITFTTD0

__IM uint32_t TPI_Type::ITFTTD0

Offset: 0xEEC (R/ ) Integration Test FIFO Test Data 0 Register

Definition at line 746 of file core_cm23.h.

◆ ITFTTD1

__IM uint32_t TPI_Type::ITFTTD1

Offset: 0xEFC (R/ ) Integration Test FIFO Test Data 1 Register

Definition at line 750 of file core_cm23.h.

◆ [] [1/18]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 212 of file core_cm0.h.

◆ [] [2/18]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 223 of file core_cm0plus.h.

◆ [] [3/18]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 212 of file core_cm1.h.

◆ [] [4/18]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 248 of file core_cm23.h.

◆ [] [5/18]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 248 of file core_armv8mbl.h.

◆ [] [6/18]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 223 of file core_sc000.h.

◆ [] [7/18]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 212 of file core_cm0.h.

◆ [] [8/18]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 223 of file core_cm0plus.h.

◆ [] [9/18]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 248 of file core_armv8mbl.h.

◆ [] [10/18]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 263 of file core_cm0.h.

◆ [] [11/18]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 274 of file core_cm0plus.h.

◆ [] [12/18]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 263 of file core_cm1.h.

◆ [] [13/18]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 299 of file core_cm23.h.

◆ [] [14/18]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 274 of file core_sc000.h.

◆ [] [15/18]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 299 of file core_armv8mbl.h.

◆ [] [16/18]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 263 of file core_cm0.h.

◆ [] [17/18]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 274 of file core_cm0plus.h.

◆ [] [18/18]

uint32_t { ... } ::N

bit: 31 Negative condition code flag

Definition at line 299 of file core_armv8mbl.h.

◆ [] [1/5]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 306 of file core_cm0plus.h.

◆ [] [2/5]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 331 of file core_cm23.h.

◆ [] [3/5]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 306 of file core_cm0plus.h.

◆ [] [4/5]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 331 of file core_armv8mbl.h.

◆ [] [5/5]

uint32_t { ... } ::nPRIV

bit: 0 Execution privilege in Thread mode

Definition at line 331 of file core_armv8mbl.h.

◆ RESERVED0 [1/4]

uint32_t CoreDebug_Type::RESERVED0

Definition at line 1002 of file core_armv8mbl.h.

◆ RESERVED0 [2/4]

uint32_t DCB_Type::RESERVED0

Definition at line 1103 of file core_armv8mbl.h.

◆ RESERVED0 [3/4]

uint32_t DWT_Type::RESERVED0

Definition at line 620 of file core_armv8mbl.h.

◆ RESERVED0 [4/4]

uint32_t SCB_Type::RESERVED0

Definition at line 395 of file core_armv8mbl.h.

◆ RESERVED1 [1/2]

uint32_t NVIC_Type::RESERVED1

Definition at line 324 of file core_cm0.h.

◆ RESERVED1 [2/2]

uint32_t SCB_Type::RESERVED1

Definition at line 400 of file core_armv8mbl.h.

◆ RESERVED5

uint32_t TPI_Type::RESERVED5

Definition at line 752 of file core_cm23.h.

◆ RESERVED7

uint32_t TPI_Type::RESERVED7

Definition at line 755 of file core_cm23.h.

◆ SFCR

__IOM uint32_t SCB_Type::SFCR

Offset: 0x290 (R/W) Security Features Control Register

Definition at line 369 of file core_sc000.h.

◆ SHP

__IOM uint8_t SCB_Type::SHP

Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED

Offset: 0x018 (R/W) System Handlers Priority Registers (4-7, 8-11, 12-15)

Definition at line 355 of file core_cm0.h.

◆ SHPR

__IOM uint32_t SCB_Type::SHPR[2U]

Offset: 0x01C (R/W) System Handlers Priority Registers. [0] is RESERVED

Definition at line 401 of file core_armv8mbl.h.

◆ [] [1/9]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 296 of file core_cm0.h.

◆ [] [2/9]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 307 of file core_cm0plus.h.

◆ [] [3/9]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 296 of file core_cm1.h.

◆ [] [4/9]

uint32_t { ... } ::SPSEL

bit: 1 Stack-pointer select

Definition at line 332 of file core_cm23.h.

◆ [] [5/9]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 307 of file core_sc000.h.

◆ [] [6/9]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 296 of file core_cm0.h.

◆ [] [7/9]

uint32_t { ... } ::SPSEL

bit: 1 Stack to be used

Definition at line 307 of file core_cm0plus.h.

◆ [] [8/9]

uint32_t { ... } ::SPSEL

bit: 1 Stack-pointer select

Definition at line 332 of file core_armv8mbl.h.

◆ [] [9/9]

uint32_t { ... } ::SPSEL

bit: 1 Stack-pointer select

Definition at line 332 of file core_armv8mbl.h.

◆ [] [1/9]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 258 of file core_cm0.h.

◆ [] [2/9]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 269 of file core_cm0plus.h.

◆ [] [3/9]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 258 of file core_cm1.h.

◆ [] [4/9]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 294 of file core_cm23.h.

◆ [] [5/9]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 269 of file core_sc000.h.

◆ [] [6/9]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 294 of file core_armv8mbl.h.

◆ [] [7/9]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 258 of file core_cm0.h.

◆ [] [8/9]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 269 of file core_cm0plus.h.

◆ [] [9/9]

uint32_t { ... } ::T

bit: 24 Thumb bit (read 0)

Definition at line 294 of file core_armv8mbl.h.

◆ TRIGGER

__IM uint32_t TPI_Type::TRIGGER

Offset: 0xEE8 (R/ ) TRIGGER Register

Definition at line 745 of file core_cm23.h.

◆ [] [1/18]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 209 of file core_cm0.h.

◆ [] [2/18]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 220 of file core_cm0plus.h.

◆ [] [3/18]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 209 of file core_cm1.h.

◆ [] [4/18]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 245 of file core_cm23.h.

◆ [] [5/18]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 245 of file core_armv8mbl.h.

◆ [] [6/18]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 220 of file core_sc000.h.

◆ [] [7/18]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 209 of file core_cm0.h.

◆ [] [8/18]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 220 of file core_cm0plus.h.

◆ [] [9/18]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 245 of file core_armv8mbl.h.

◆ [] [10/18]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 260 of file core_cm0.h.

◆ [] [11/18]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 271 of file core_cm0plus.h.

◆ [] [12/18]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 260 of file core_cm1.h.

◆ [] [13/18]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 296 of file core_cm23.h.

◆ [] [14/18]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 271 of file core_sc000.h.

◆ [] [15/18]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 296 of file core_armv8mbl.h.

◆ [] [16/18]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 260 of file core_cm0.h.

◆ [] [17/18]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 271 of file core_cm0plus.h.

◆ [] [18/18]

uint32_t { ... } ::V

bit: 28 Overflow condition code flag

Definition at line 296 of file core_armv8mbl.h.