Union type to access the Special-Purpose Program Status Registers (xPSR). More...

#include <core_armv81mml.h>

Public Attributes
struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:7

uint32_t xPSR_Type::GE:4

uint32_t xPSR_Type::_reserved1:4

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::IT:2

uint32_t xPSR_Type::Q:1

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

uint32_t	w

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:7

uint32_t xPSR_Type::GE:4

uint32_t xPSR_Type::_reserved1:4

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::IT:2

uint32_t xPSR_Type::Q:1

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:1

uint32_t xPSR_Type::ICI_IT_1:6

uint32_t xPSR_Type::_reserved1:8

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::ICI_IT_2:2

uint32_t xPSR_Type::Q:1

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:7

uint32_t xPSR_Type::GE:4

uint32_t xPSR_Type::_reserved1:4

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::IT:2

uint32_t xPSR_Type::Q:1

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:7

uint32_t xPSR_Type::GE:4

uint32_t xPSR_Type::_reserved1:4

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::IT:2

uint32_t xPSR_Type::Q:1

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:1

uint32_t xPSR_Type::ICI_IT_1:6

uint32_t xPSR_Type::GE:4

uint32_t xPSR_Type::_reserved1:4

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::ICI_IT_2:2

uint32_t xPSR_Type::Q:1

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:7

uint32_t xPSR_Type::GE:4

uint32_t xPSR_Type::_reserved1:4

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::IT:2

uint32_t xPSR_Type::Q:1

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:1

uint32_t xPSR_Type::ICI_IT_1:6

uint32_t xPSR_Type::GE:4

uint32_t xPSR_Type::_reserved1:4

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::ICI_IT_2:2

uint32_t xPSR_Type::Q:1

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:7

uint32_t xPSR_Type::GE:4

uint32_t xPSR_Type::_reserved1:1

uint32_t xPSR_Type::B:1

uint32_t xPSR_Type::_reserved2:2

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::IT:2

uint32_t xPSR_Type::Q:1

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:1

uint32_t xPSR_Type::ICI_IT_1:6

uint32_t xPSR_Type::_reserved1:8

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::ICI_IT_2:2

uint32_t xPSR_Type::Q:1

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:7

uint32_t xPSR_Type::GE:4

uint32_t xPSR_Type::_reserved1:4

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::IT:2

uint32_t xPSR_Type::Q:1

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:7

uint32_t xPSR_Type::GE:4

uint32_t xPSR_Type::_reserved1:4

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::IT:2

uint32_t xPSR_Type::Q:1

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:15

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::_reserved1:3

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:7

uint32_t xPSR_Type::GE:4

uint32_t xPSR_Type::_reserved1:4

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::IT:2

uint32_t xPSR_Type::Q:1

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:7

uint32_t xPSR_Type::GE:4

uint32_t xPSR_Type::_reserved1:4

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::IT:2

uint32_t xPSR_Type::Q:1

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

struct {

uint32_t xPSR_Type::ISR:9

uint32_t xPSR_Type::_reserved0:1

uint32_t xPSR_Type::ICI_IT_1:6

uint32_t xPSR_Type::GE:4

uint32_t xPSR_Type::_reserved1:4

uint32_t xPSR_Type::T:1

uint32_t xPSR_Type::ICI_IT_2:2

uint32_t xPSR_Type::Q:1

uint32_t xPSR_Type::V:1

uint32_t xPSR_Type::C:1

uint32_t xPSR_Type::Z:1

uint32_t xPSR_Type::N:1

}	b

Detailed Description

Union type to access the Special-Purpose Program Status Registers (xPSR).

Definition at line 408 of file core_armv81mml.h.

The documentation for this union was generated from the following files:

/builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_armv81mml.h
/builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_armv8mbl.h
/builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_armv8mml.h
/builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm0.h
/builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm0plus.h
/builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm1.h
/builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm23.h
/builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm3.h
/builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm33.h
/builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm35p.h
/builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm4.h
/builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm55.h
/builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm7.h
/builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm85.h
/builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_sc000.h
/builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_sc300.h
/builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_starmc1.h
/builds/Terstegge/yahal_with_examples/include/CPU/cortex-m0plus/core_cm0.h
/builds/Terstegge/yahal_with_examples/include/CPU/cortex-m0plus/core_cm0plus.h
/builds/Terstegge/yahal_with_examples/include/CPU/cortex-m33fd/core_armv81mml.h
/builds/Terstegge/yahal_with_examples/include/CPU/cortex-m33fd/core_armv8mbl.h
/builds/Terstegge/yahal_with_examples/include/CPU/cortex-m33fd/core_armv8mml.h
/builds/Terstegge/yahal_with_examples/include/CPU/cortex-m33fd/core_cm33.h
/builds/Terstegge/yahal_with_examples/include/CPU/cortex-m4f/core_cm4.h

Public Attributes

Detailed Description