CONTROL_Type Union Reference

Union type to access the Control Registers (CONTROL). More...

#include <core_armv81mml.h>

Public Attributes
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::_reserved1:28
}	b
uint32_t	w
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::_reserved1:30
}	b
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::_reserved1:28
}	b
struct {
uint32_t   CONTROL_Type::_reserved0:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::_reserved1:30
}	b
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::_reserved1:30
}	b
struct {
uint32_t   CONTROL_Type::_reserved0:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::_reserved1:30
}	b
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::_reserved1:30
}	b
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::_reserved1:30
}	b
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::_reserved1:28
}	b
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::_reserved1:28
}	b
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::_reserved0:29
}	b
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::_reserved1:28
}	b
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::_reserved0:29
}	b
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::BTI_EN:1
uint32_t   CONTROL_Type::UBTI_EN:1
uint32_t   CONTROL_Type::PAC_EN:1
uint32_t   CONTROL_Type::UPAC_EN:1
uint32_t   CONTROL_Type::_reserved1:24
}	b
struct {
uint32_t   CONTROL_Type::_reserved0:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::_reserved1:30
}	b
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::_reserved1:30
}	b
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::_reserved1:28
}	b
struct {
uint32_t   CONTROL_Type::_reserved0:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::_reserved1:30
}	b
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::_reserved1:30
}	b
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::_reserved1:28
}	b
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::_reserved1:30
}	b
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::_reserved1:28
}	b
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::SFPA:1
uint32_t   CONTROL_Type::_reserved1:28
}	b
struct {
uint32_t   CONTROL_Type::nPRIV:1
uint32_t   CONTROL_Type::SPSEL:1
uint32_t   CONTROL_Type::FPCA:1
uint32_t   CONTROL_Type::_reserved0:29
}	b

Detailed Description

Union type to access the Control Registers (CONTROL).

Definition at line 459 of file core_armv81mml.h.

---

The documentation for this union was generated from the following files:

• /builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_armv81mml.h
• /builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_armv8mbl.h
• /builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_armv8mml.h
• /builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm0.h
• /builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm0plus.h
• /builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm1.h
• /builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm23.h
• /builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm3.h
• /builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm33.h
• /builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm35p.h
• /builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm4.h
• /builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm55.h
• /builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm7.h
• /builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_cm85.h
• /builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_sc000.h
• /builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_sc300.h
• /builds/Terstegge/yahal_with_examples/include/CPU/CMSIS/core_starmc1.h
• /builds/Terstegge/yahal_with_examples/include/CPU/cortex-m0plus/core_cm0.h
• /builds/Terstegge/yahal_with_examples/include/CPU/cortex-m0plus/core_cm0plus.h
• /builds/Terstegge/yahal_with_examples/include/CPU/cortex-m33fd/core_armv81mml.h
• /builds/Terstegge/yahal_with_examples/include/CPU/cortex-m33fd/core_armv8mbl.h
• /builds/Terstegge/yahal_with_examples/include/CPU/cortex-m33fd/core_armv8mml.h
• /builds/Terstegge/yahal_with_examples/include/CPU/cortex-m33fd/core_cm33.h
• /builds/Terstegge/yahal_with_examples/include/CPU/cortex-m4f/core_cm4.h