Topics
	MSP432P401R Peripherals

Macros
#define	FLASH_BASE ((uint32_t)0x00000000)

#define	SRAM_BASE ((uint32_t)0x20000000)

#define	PERIPH_BASE ((uint32_t)0x40000000)

#define	PERIPH_BASE2 ((uint32_t)0xE0000000)

#define	ADC14_BASE (PERIPH_BASE +0x00012000)

#define	AES256_BASE (PERIPH_BASE +0x00003C00)

#define	CAPTIO0_BASE (PERIPH_BASE +0x00005400)

#define	CAPTIO1_BASE (PERIPH_BASE +0x00005800)

#define	COMP_E0_BASE (PERIPH_BASE +0x00003400)

#define	COMP_E1_BASE (PERIPH_BASE +0x00003800)

#define	CRC32_BASE (PERIPH_BASE +0x00004000)

#define	CS_BASE (PERIPH_BASE +0x00010400)

#define	DIO_BASE (PERIPH_BASE +0x00004C00)

#define	DMA_BASE (PERIPH_BASE +0x0000E000)

#define	EUSCI_A0_BASE (PERIPH_BASE +0x00001000)

#define	EUSCI_A0_SPI_BASE (PERIPH_BASE +0x00001000)

#define	EUSCI_A1_BASE (PERIPH_BASE +0x00001400)

#define	EUSCI_A1_SPI_BASE (PERIPH_BASE +0x00001400)

#define	EUSCI_A2_BASE (PERIPH_BASE +0x00001800)

#define	EUSCI_A2_SPI_BASE (PERIPH_BASE +0x00001800)

#define	EUSCI_A3_BASE (PERIPH_BASE +0x00001C00)

#define	EUSCI_A3_SPI_BASE (PERIPH_BASE +0x00001C00)

#define	EUSCI_B0_BASE (PERIPH_BASE +0x00002000)

#define	EUSCI_B0_SPI_BASE (PERIPH_BASE +0x00002000)

#define	EUSCI_B1_BASE (PERIPH_BASE +0x00002400)

#define	EUSCI_B1_SPI_BASE (PERIPH_BASE +0x00002400)

#define	EUSCI_B2_BASE (PERIPH_BASE +0x00002800)

#define	EUSCI_B2_SPI_BASE (PERIPH_BASE +0x00002800)

#define	EUSCI_B3_BASE (PERIPH_BASE +0x00002C00)

#define	EUSCI_B3_SPI_BASE (PERIPH_BASE +0x00002C00)

#define	FLCTL_BASE (PERIPH_BASE +0x00011000)

#define	FL_BOOTOVER_MAILBOX_BASE ((uint32_t)0x00200000)

#define	PCM_BASE (PERIPH_BASE +0x00010000)

#define	PMAP_BASE (PERIPH_BASE +0x00005000)

#define	PSS_BASE (PERIPH_BASE +0x00010800)

#define	REF_A_BASE (PERIPH_BASE +0x00003000)

#define	RSTCTL_BASE (PERIPH_BASE2+0x00042000)

#define	RTC_C_BASE (PERIPH_BASE +0x00004400)

#define	RTC_C_BCD_BASE (PERIPH_BASE +0x00004400)

#define	SYSCTL_BASE (PERIPH_BASE2+0x00043000)

#define	TIMER32_BASE (PERIPH_BASE +0x0000C000)

#define	TIMER_A0_BASE (PERIPH_BASE +0x00000000)

#define	TIMER_A1_BASE (PERIPH_BASE +0x00000400)

#define	TIMER_A2_BASE (PERIPH_BASE +0x00000800)

#define	TIMER_A3_BASE (PERIPH_BASE +0x00000C00)

#define	TLV_BASE ((uint32_t)0x00201000)

#define	WDT_A_BASE (PERIPH_BASE +0x00004800)

#define	BITBAND_SRAM_BASE ((uint32_t)(0x22000000))

#define	BITBAND_PERI_BASE ((uint32_t)(0x42000000))

#define	BITBAND_SRAM(x, b)

#define	BITBAND_PERI(x, b)

Detailed Description

Macro Definition Documentation

◆ ADC14_BASE

#define ADC14_BASE (PERIPH_BASE +0x00012000)

Base address of module ADC14 registers

Definition at line 274 of file msp432p401r.h.

◆ AES256_BASE

#define AES256_BASE (PERIPH_BASE +0x00003C00)

Base address of module AES256 registers

Definition at line 275 of file msp432p401r.h.

◆ BITBAND_PERI

#define BITBAND_PERI	(		x,
			b )

Value:

(*((__IO uint8_t *) (BITBAND_PERI_BASE + (((uint32_t)(volatile const uint32_t *)&(x)) - PERIPH_BASE)*32 + (b)*4)))

__IO

#define __IO

Definition core_armv81mml.h:313

PERIPH_BASE

#define PERIPH_BASE

Definition msp432p401r.h:271

Definition at line 330 of file msp432p401r.h.

◆ BITBAND_PERI_BASE

#define BITBAND_PERI_BASE ((uint32_t)(0x42000000))

Definition at line 325 of file msp432p401r.h.

◆ BITBAND_SRAM

#define BITBAND_SRAM	(		x,
			b )

Value:

(*((__IO uint32_t *) (BITBAND_SRAM_BASE + (((uint32_t)(volatile const uint32_t *)&(x)) - SRAM_BASE )*32 + (b)*4)))

SRAM_BASE

#define SRAM_BASE

Definition msp432p401r.h:270

Definition at line 328 of file msp432p401r.h.

◆ BITBAND_SRAM_BASE

#define BITBAND_SRAM_BASE ((uint32_t)(0x22000000))

Definition at line 324 of file msp432p401r.h.

◆ CAPTIO0_BASE

#define CAPTIO0_BASE (PERIPH_BASE +0x00005400)

Base address of module CAPTIO0 registers

Definition at line 276 of file msp432p401r.h.

◆ CAPTIO1_BASE

#define CAPTIO1_BASE (PERIPH_BASE +0x00005800)

Base address of module CAPTIO1 registers

Definition at line 277 of file msp432p401r.h.

◆ COMP_E0_BASE

#define COMP_E0_BASE (PERIPH_BASE +0x00003400)

Base address of module COMP_E0 registers

Definition at line 278 of file msp432p401r.h.

◆ COMP_E1_BASE

#define COMP_E1_BASE (PERIPH_BASE +0x00003800)

Base address of module COMP_E1 registers

Definition at line 279 of file msp432p401r.h.

◆ CRC32_BASE

#define CRC32_BASE (PERIPH_BASE +0x00004000)

Base address of module CRC32 registers

Definition at line 280 of file msp432p401r.h.

◆ CS_BASE

#define CS_BASE (PERIPH_BASE +0x00010400)

Base address of module CS registers

Definition at line 281 of file msp432p401r.h.

◆ DIO_BASE

#define DIO_BASE (PERIPH_BASE +0x00004C00)

Base address of module DIO registers

Definition at line 282 of file msp432p401r.h.

◆ DMA_BASE

#define DMA_BASE (PERIPH_BASE +0x0000E000)

Base address of module DMA registers

Definition at line 283 of file msp432p401r.h.

◆ EUSCI_A0_BASE

#define EUSCI_A0_BASE (PERIPH_BASE +0x00001000)

Base address of module EUSCI_A0 registers

Definition at line 284 of file msp432p401r.h.

◆ EUSCI_A0_SPI_BASE

#define EUSCI_A0_SPI_BASE (PERIPH_BASE +0x00001000)

Base address of module EUSCI_A0 registers

Definition at line 285 of file msp432p401r.h.

◆ EUSCI_A1_BASE

#define EUSCI_A1_BASE (PERIPH_BASE +0x00001400)

Base address of module EUSCI_A1 registers

Definition at line 286 of file msp432p401r.h.

◆ EUSCI_A1_SPI_BASE

#define EUSCI_A1_SPI_BASE (PERIPH_BASE +0x00001400)

Base address of module EUSCI_A1 registers

Definition at line 287 of file msp432p401r.h.

◆ EUSCI_A2_BASE

#define EUSCI_A2_BASE (PERIPH_BASE +0x00001800)

Base address of module EUSCI_A2 registers

Definition at line 288 of file msp432p401r.h.

◆ EUSCI_A2_SPI_BASE

#define EUSCI_A2_SPI_BASE (PERIPH_BASE +0x00001800)

Base address of module EUSCI_A2 registers

Definition at line 289 of file msp432p401r.h.

◆ EUSCI_A3_BASE

#define EUSCI_A3_BASE (PERIPH_BASE +0x00001C00)

Base address of module EUSCI_A3 registers

Definition at line 290 of file msp432p401r.h.

◆ EUSCI_A3_SPI_BASE

#define EUSCI_A3_SPI_BASE (PERIPH_BASE +0x00001C00)

Base address of module EUSCI_A3 registers

Definition at line 291 of file msp432p401r.h.

◆ EUSCI_B0_BASE

#define EUSCI_B0_BASE (PERIPH_BASE +0x00002000)

Base address of module EUSCI_B0 registers

Definition at line 292 of file msp432p401r.h.

◆ EUSCI_B0_SPI_BASE

#define EUSCI_B0_SPI_BASE (PERIPH_BASE +0x00002000)

Base address of module EUSCI_B0 registers

Definition at line 293 of file msp432p401r.h.

◆ EUSCI_B1_BASE

#define EUSCI_B1_BASE (PERIPH_BASE +0x00002400)

Base address of module EUSCI_B1 registers

Definition at line 294 of file msp432p401r.h.

◆ EUSCI_B1_SPI_BASE

#define EUSCI_B1_SPI_BASE (PERIPH_BASE +0x00002400)

Base address of module EUSCI_B1 registers

Definition at line 295 of file msp432p401r.h.

◆ EUSCI_B2_BASE

#define EUSCI_B2_BASE (PERIPH_BASE +0x00002800)

Base address of module EUSCI_B2 registers

Definition at line 296 of file msp432p401r.h.

◆ EUSCI_B2_SPI_BASE

#define EUSCI_B2_SPI_BASE (PERIPH_BASE +0x00002800)

Base address of module EUSCI_B2 registers

Definition at line 297 of file msp432p401r.h.

◆ EUSCI_B3_BASE

#define EUSCI_B3_BASE (PERIPH_BASE +0x00002C00)

Base address of module EUSCI_B3 registers

Definition at line 298 of file msp432p401r.h.

◆ EUSCI_B3_SPI_BASE

#define EUSCI_B3_SPI_BASE (PERIPH_BASE +0x00002C00)

Base address of module EUSCI_B3 registers

Definition at line 299 of file msp432p401r.h.

◆ FL_BOOTOVER_MAILBOX_BASE

#define FL_BOOTOVER_MAILBOX_BASE ((uint32_t)0x00200000)

Base address of module FL_BOOTOVER_MAILBOX registers

Definition at line 301 of file msp432p401r.h.

◆ FLASH_BASE

#define FLASH_BASE ((uint32_t)0x00000000)

Main Flash memory start address

Definition at line 269 of file msp432p401r.h.

◆ FLCTL_BASE

#define FLCTL_BASE (PERIPH_BASE +0x00011000)

Base address of module FLCTL registers

Definition at line 300 of file msp432p401r.h.

◆ PCM_BASE

#define PCM_BASE (PERIPH_BASE +0x00010000)

Base address of module PCM registers

Definition at line 302 of file msp432p401r.h.

◆ PERIPH_BASE

#define PERIPH_BASE ((uint32_t)0x40000000)

Peripherals start address

Definition at line 271 of file msp432p401r.h.

◆ PERIPH_BASE2

#define PERIPH_BASE2 ((uint32_t)0xE0000000)

Peripherals start address

Definition at line 272 of file msp432p401r.h.

◆ PMAP_BASE

#define PMAP_BASE (PERIPH_BASE +0x00005000)

Base address of module PMAP registers

Definition at line 303 of file msp432p401r.h.

◆ PSS_BASE

#define PSS_BASE (PERIPH_BASE +0x00010800)

Base address of module PSS registers

Definition at line 304 of file msp432p401r.h.

◆ REF_A_BASE

#define REF_A_BASE (PERIPH_BASE +0x00003000)

Base address of module REF_A registers

Definition at line 305 of file msp432p401r.h.

◆ RSTCTL_BASE

#define RSTCTL_BASE (PERIPH_BASE2+0x00042000)

Base address of module RSTCTL registers

Definition at line 306 of file msp432p401r.h.

◆ RTC_C_BASE

#define RTC_C_BASE (PERIPH_BASE +0x00004400)

Base address of module RTC_C registers

Definition at line 307 of file msp432p401r.h.

◆ RTC_C_BCD_BASE

#define RTC_C_BCD_BASE (PERIPH_BASE +0x00004400)

Base address of module RTC_C registers

Definition at line 308 of file msp432p401r.h.

◆ SRAM_BASE

#define SRAM_BASE ((uint32_t)0x20000000)

SRAM memory start address

Definition at line 270 of file msp432p401r.h.

◆ SYSCTL_BASE

#define SYSCTL_BASE (PERIPH_BASE2+0x00043000)

Base address of module SYSCTL registers

Definition at line 309 of file msp432p401r.h.

◆ TIMER32_BASE

#define TIMER32_BASE (PERIPH_BASE +0x0000C000)

Base address of module TIMER32 registers

Definition at line 310 of file msp432p401r.h.

◆ TIMER_A0_BASE

#define TIMER_A0_BASE (PERIPH_BASE +0x00000000)

Base address of module TIMER_A0 registers

Definition at line 311 of file msp432p401r.h.

◆ TIMER_A1_BASE

#define TIMER_A1_BASE (PERIPH_BASE +0x00000400)

Base address of module TIMER_A1 registers

Definition at line 312 of file msp432p401r.h.

◆ TIMER_A2_BASE

#define TIMER_A2_BASE (PERIPH_BASE +0x00000800)

Base address of module TIMER_A2 registers

Definition at line 313 of file msp432p401r.h.

◆ TIMER_A3_BASE

#define TIMER_A3_BASE (PERIPH_BASE +0x00000C00)

Base address of module TIMER_A3 registers

Definition at line 314 of file msp432p401r.h.

◆ TLV_BASE

#define TLV_BASE ((uint32_t)0x00201000)

Base address of module TLV registers

Definition at line 315 of file msp432p401r.h.

◆ WDT_A_BASE

#define WDT_A_BASE (PERIPH_BASE +0x00004800)

Base address of module WDT_A registers

Definition at line 316 of file msp432p401r.h.

Topics

Macros