Topics
	CMSIS Core Register Access Functions

Macros
#define	__NOP __nop
	No Operation.

#define	__WFI __wfi
	Wait For Interrupt.

#define	__WFE __wfe
	Wait For Event.

#define	__SEV __sev
	Send Event.

#define	__ISB()
	Instruction Synchronization Barrier.

#define	__DSB()
	Data Synchronization Barrier.

#define	__DMB()
	Data Memory Barrier.

#define	__REV __rev
	Reverse byte order (32 bit)

#define	__ROR __ror
	Rotate Right in unsigned value (32 bit)

#define	__BKPT(value)
	Breakpoint.

#define	__CLZ __clz
	Count leading zeros.

#define	__CMSIS_GCC_OUT_REG(r)

#define	__CMSIS_GCC_RW_REG(r)

#define	__CMSIS_GCC_USE_REG(r)

#define	__NOP __builtin_arm_nop
	No Operation.

#define	__WFI __builtin_arm_wfi
	Wait For Interrupt.

#define	__WFE __builtin_arm_wfe
	Wait For Event.

#define	__SEV __builtin_arm_sev
	Send Event.

#define	__ISB()
	Instruction Synchronization Barrier.

#define	__DSB()
	Data Synchronization Barrier.

#define	__DMB()
	Data Memory Barrier.

#define	__REV(value)
	Reverse byte order (32 bit)

#define	__REV16(value)
	Reverse byte order (16 bit)

#define	__REVSH(value)
	Reverse byte order (16 bit)

#define	__BKPT(value)
	Breakpoint.

#define	__RBIT __builtin_arm_rbit
	Reverse bit order of value.

#define	__CMSIS_GCC_OUT_REG(r)

#define	__CMSIS_GCC_USE_REG(r)

#define	__NOP __builtin_arm_nop
	No Operation.

#define	__WFI __builtin_arm_wfi
	Wait For Interrupt.

#define	__WFE __builtin_arm_wfe
	Wait For Event.

#define	__SEV __builtin_arm_sev
	Send Event.

#define	__ISB()
	Instruction Synchronization Barrier.

#define	__DSB()
	Data Synchronization Barrier.

#define	__DMB()
	Data Memory Barrier.

#define	__REV(value)
	Reverse byte order (32 bit)

#define	__REV16(value)
	Reverse byte order (16 bit)

#define	__REVSH(value)
	Reverse byte order (16 bit)

#define	__BKPT(value)
	Breakpoint.

#define	__RBIT __builtin_arm_rbit
	Reverse bit order of value.

#define	__CMSIS_GCC_OUT_REG(r)

#define	__CMSIS_GCC_RW_REG(r)

#define	__CMSIS_GCC_USE_REG(r)

#define	__NOP()
	No Operation.

#define	__WFI()
	Wait For Interrupt.

#define	__WFE()
	Wait For Event.

#define	__SEV()
	Send Event.

#define	__BKPT(value)
	Breakpoint.

#define	__CMSIS_GCC_OUT_REG(r)

#define	__CMSIS_GCC_RW_REG(r)

#define	__CMSIS_GCC_USE_REG(r)

#define	__NOP __builtin_arm_nop
	No Operation.

#define	__WFI __builtin_arm_wfi
	Wait For Interrupt.

#define	__WFE __builtin_arm_wfe
	Wait For Event.

#define	__SEV __builtin_arm_sev
	Send Event.

#define	__ISB()
	Instruction Synchronization Barrier.

#define	__DSB()
	Data Synchronization Barrier.

#define	__DMB()
	Data Memory Barrier.

#define	__REV(value)
	Reverse byte order (32 bit)

#define	__REV16(value)
	Reverse byte order (16 bit)

#define	__REVSH(value)
	Reverse byte order (16 bit)

#define	__BKPT(value)
	Breakpoint.

#define	__RBIT __builtin_arm_rbit
	Reverse bit order of value.

#define	__NOP __nop
	No Operation.

#define	__WFI __wfi
	Wait For Interrupt.

#define	__WFE __wfe
	Wait For Event.

#define	__SEV __sev
	Send Event.

#define	__ISB()
	Instruction Synchronization Barrier.

#define	__DSB()
	Data Synchronization Barrier.

#define	__DMB()
	Data Memory Barrier.

#define	__REV __rev
	Reverse byte order (32 bit)

#define	__ROR __ror
	Rotate Right in unsigned value (32 bit)

#define	__BKPT(value)
	Breakpoint.

#define	__CLZ __clz
	Count leading zeros.

#define	__CMSIS_GCC_OUT_REG(r)

#define	__CMSIS_GCC_RW_REG(r)

#define	__CMSIS_GCC_USE_REG(r)

#define	__NOP __builtin_arm_nop
	No Operation.

#define	__WFI __builtin_arm_wfi
	Wait For Interrupt.

#define	__WFE __builtin_arm_wfe
	Wait For Event.

#define	__SEV __builtin_arm_sev
	Send Event.

#define	__ISB()
	Instruction Synchronization Barrier.

#define	__DSB()
	Data Synchronization Barrier.

#define	__DMB()
	Data Memory Barrier.

#define	__REV(value)
	Reverse byte order (32 bit)

#define	__REV16(value)
	Reverse byte order (16 bit)

#define	__REVSH(value)
	Reverse byte order (16 bit)

#define	__BKPT(value)
	Breakpoint.

#define	__RBIT __builtin_arm_rbit
	Reverse bit order of value.

#define	__CMSIS_GCC_OUT_REG(r)

#define	__CMSIS_GCC_USE_REG(r)

#define	__NOP __builtin_arm_nop
	No Operation.

#define	__WFI __builtin_arm_wfi
	Wait For Interrupt.

#define	__WFE __builtin_arm_wfe
	Wait For Event.

#define	__SEV __builtin_arm_sev
	Send Event.

#define	__ISB()
	Instruction Synchronization Barrier.

#define	__DSB()
	Data Synchronization Barrier.

#define	__DMB()
	Data Memory Barrier.

#define	__REV(value)
	Reverse byte order (32 bit)

#define	__REV16(value)
	Reverse byte order (16 bit)

#define	__REVSH(value)
	Reverse byte order (16 bit)

#define	__BKPT(value)
	Breakpoint.

#define	__RBIT __builtin_arm_rbit
	Reverse bit order of value.

#define	__CMSIS_GCC_OUT_REG(r)

#define	__CMSIS_GCC_RW_REG(r)

#define	__CMSIS_GCC_USE_REG(r)

#define	__NOP()
	No Operation.

#define	__WFI()
	Wait For Interrupt.

#define	__WFE()
	Wait For Event.

#define	__SEV()
	Send Event.

#define	__BKPT(value)
	Breakpoint.

#define	__CMSIS_GCC_OUT_REG(r)

#define	__CMSIS_GCC_RW_REG(r)

#define	__CMSIS_GCC_USE_REG(r)

#define	__NOP __builtin_arm_nop
	No Operation.

#define	__WFI __builtin_arm_wfi
	Wait For Interrupt.

#define	__WFE __builtin_arm_wfe
	Wait For Event.

#define	__SEV __builtin_arm_sev
	Send Event.

#define	__ISB()
	Instruction Synchronization Barrier.

#define	__DSB()
	Data Synchronization Barrier.

#define	__DMB()
	Data Memory Barrier.

#define	__REV(value)
	Reverse byte order (32 bit)

#define	__REV16(value)
	Reverse byte order (16 bit)

#define	__REVSH(value)
	Reverse byte order (16 bit)

#define	__BKPT(value)
	Breakpoint.

#define	__RBIT __builtin_arm_rbit
	Reverse bit order of value.

#define	__NOP __nop
	No Operation.

#define	__WFI __wfi
	Wait For Interrupt.

#define	__WFE __wfe
	Wait For Event.

#define	__SEV __sev
	Send Event.

#define	__ISB()
	Instruction Synchronization Barrier.

#define	__DSB()
	Data Synchronization Barrier.

#define	__DMB()
	Data Memory Barrier.

#define	__REV __rev
	Reverse byte order (32 bit)

#define	__ROR __ror
	Rotate Right in unsigned value (32 bit)

#define	__BKPT(value)
	Breakpoint.

#define	__CLZ __clz
	Count leading zeros.

#define	__CMSIS_GCC_OUT_REG(r)

#define	__CMSIS_GCC_RW_REG(r)

#define	__CMSIS_GCC_USE_REG(r)

#define	__NOP __builtin_arm_nop
	No Operation.

#define	__WFI __builtin_arm_wfi
	Wait For Interrupt.

#define	__WFE __builtin_arm_wfe
	Wait For Event.

#define	__SEV __builtin_arm_sev
	Send Event.

#define	__ISB()
	Instruction Synchronization Barrier.

#define	__DSB()
	Data Synchronization Barrier.

#define	__DMB()
	Data Memory Barrier.

#define	__REV(value)
	Reverse byte order (32 bit)

#define	__REV16(value)
	Reverse byte order (16 bit)

#define	__REVSH(value)
	Reverse byte order (16 bit)

#define	__BKPT(value)
	Breakpoint.

#define	__RBIT __builtin_arm_rbit
	Reverse bit order of value.

#define	__CMSIS_GCC_OUT_REG(r)

#define	__CMSIS_GCC_USE_REG(r)

#define	__NOP __builtin_arm_nop
	No Operation.

#define	__WFI __builtin_arm_wfi
	Wait For Interrupt.

#define	__WFE __builtin_arm_wfe
	Wait For Event.

#define	__SEV __builtin_arm_sev
	Send Event.

#define	__ISB()
	Instruction Synchronization Barrier.

#define	__DSB()
	Data Synchronization Barrier.

#define	__DMB()
	Data Memory Barrier.

#define	__REV(value)
	Reverse byte order (32 bit)

#define	__REV16(value)
	Reverse byte order (16 bit)

#define	__REVSH(value)
	Reverse byte order (16 bit)

#define	__BKPT(value)
	Breakpoint.

#define	__RBIT __builtin_arm_rbit
	Reverse bit order of value.

#define	__CMSIS_GCC_OUT_REG(r)

#define	__CMSIS_GCC_RW_REG(r)

#define	__CMSIS_GCC_USE_REG(r)

#define	__NOP()
	No Operation.

#define	__WFI()
	Wait For Interrupt.

#define	__WFE()
	Wait For Event.

#define	__SEV()
	Send Event.

#define	__BKPT(value)
	Breakpoint.

#define	__NOP __nop
	No Operation.

#define	__WFI __wfi
	Wait For Interrupt.

#define	__WFE __wfe
	Wait For Event.

#define	__SEV __sev
	Send Event.

#define	__ISB()
	Instruction Synchronization Barrier.

#define	__DSB()
	Data Synchronization Barrier.

#define	__DMB()
	Data Memory Barrier.

#define	__REV __rev
	Reverse byte order (32 bit)

#define	__ROR __ror
	Rotate Right in unsigned value (32 bit)

#define	__BKPT(value)
	Breakpoint.

#define	__CLZ __clz
	Count leading zeros.

#define	__CMSIS_GCC_OUT_REG(r)

#define	__CMSIS_GCC_RW_REG(r)

#define	__CMSIS_GCC_USE_REG(r)

#define	__NOP __builtin_arm_nop
	No Operation.

#define	__WFI __builtin_arm_wfi
	Wait For Interrupt.

#define	__WFE __builtin_arm_wfe
	Wait For Event.

#define	__SEV __builtin_arm_sev
	Send Event.

#define	__ISB()
	Instruction Synchronization Barrier.

#define	__DSB()
	Data Synchronization Barrier.

#define	__DMB()
	Data Memory Barrier.

#define	__REV(value)
	Reverse byte order (32 bit)

#define	__REV16(value)
	Reverse byte order (16 bit)

#define	__REVSH(value)
	Reverse byte order (16 bit)

#define	__BKPT(value)
	Breakpoint.

#define	__RBIT __builtin_arm_rbit
	Reverse bit order of value.

#define	__CMSIS_GCC_OUT_REG(r)

#define	__CMSIS_GCC_USE_REG(r)

#define	__NOP __builtin_arm_nop
	No Operation.

#define	__WFI __builtin_arm_wfi
	Wait For Interrupt.

#define	__WFE __builtin_arm_wfe
	Wait For Event.

#define	__SEV __builtin_arm_sev
	Send Event.

#define	__ISB()
	Instruction Synchronization Barrier.

#define	__DSB()
	Data Synchronization Barrier.

#define	__DMB()
	Data Memory Barrier.

#define	__REV(value)
	Reverse byte order (32 bit)

#define	__REV16(value)
	Reverse byte order (16 bit)

#define	__REVSH(value)
	Reverse byte order (16 bit)

#define	__BKPT(value)
	Breakpoint.

#define	__RBIT __builtin_arm_rbit
	Reverse bit order of value.

#define	__CMSIS_GCC_OUT_REG(r)

#define	__CMSIS_GCC_RW_REG(r)

#define	__CMSIS_GCC_USE_REG(r)

#define	__NOP()
	No Operation.

#define	__WFI()
	Wait For Interrupt.

#define	__WFE()
	Wait For Event.

#define	__SEV()
	Send Event.

#define	__BKPT(value)
	Breakpoint.

#define	__CMSIS_GCC_OUT_REG(r)

#define	__CMSIS_GCC_RW_REG(r)

#define	__CMSIS_GCC_USE_REG(r)

#define	__NOP __builtin_arm_nop
	No Operation.

#define	__WFI __builtin_arm_wfi
	Wait For Interrupt.

#define	__WFE __builtin_arm_wfe
	Wait For Event.

#define	__SEV __builtin_arm_sev
	Send Event.

#define	__ISB()
	Instruction Synchronization Barrier.

#define	__DSB()
	Data Synchronization Barrier.

#define	__DMB()
	Data Memory Barrier.

#define	__REV(value)
	Reverse byte order (32 bit)

#define	__REV16(value)
	Reverse byte order (16 bit)

#define	__REVSH(value)
	Reverse byte order (16 bit)

#define	__BKPT(value)
	Breakpoint.

#define	__RBIT __builtin_arm_rbit
	Reverse bit order of value.

Functions
	__attribute__ ((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
	Reverse byte order (16 bit)

	__attribute__ ((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)
	Reverse byte order (16 bit)

	__attribute__ ((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
	Reverse bit order of value.

__STATIC_FORCEINLINE uint32_t	__ROR (uint32_t op1, uint32_t op2)
	Rotate Right in unsigned value (32 bit)

__STATIC_FORCEINLINE uint8_t	__CLZ (uint32_t value)
	Count leading zeros.

__STATIC_FORCEINLINE int32_t	__SSAT (int32_t val, uint32_t sat)
	Signed Saturate.

__STATIC_FORCEINLINE uint32_t	__USAT (int32_t val, uint32_t sat)
	Unsigned Saturate.

__STATIC_FORCEINLINE void	__ISB (void)
	Instruction Synchronization Barrier.

__STATIC_FORCEINLINE void	__DSB (void)
	Data Synchronization Barrier.

__STATIC_FORCEINLINE void	__DMB (void)
	Data Memory Barrier.

__STATIC_FORCEINLINE uint32_t	__REV (uint32_t value)
	Reverse byte order (32 bit)

__STATIC_FORCEINLINE uint32_t	__REV16 (uint32_t value)
	Reverse byte order (16 bit)

__STATIC_FORCEINLINE int16_t	__REVSH (int16_t value)
	Reverse byte order (16 bit)

__STATIC_FORCEINLINE uint32_t	__RBIT (uint32_t value)
	Reverse bit order of value.

Variables
uint32_t	sat

uint32_t	sat

uint32_t	sat

uint32_t	sat

Detailed Description

Access to dedicated instructions

Macro Definition Documentation

◆ __BKPT [1/19]

#define __BKPT ( value )

Value:

__breakpoint(value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

[in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 254 of file cmsis_armcc.h.

◆ __BKPT [2/19]

#define __BKPT ( value )

Value:

__ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

[in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 285 of file cmsis_armclang.h.

◆ __BKPT [3/19]

#define __BKPT ( value )

Value:

__ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

[in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 282 of file cmsis_armclang_ltm.h.

◆ __BKPT [4/19]

#define __BKPT ( value )

Value:

__ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

[in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 370 of file cmsis_gcc.h.

◆ __BKPT [5/19]

#define __BKPT ( value )

Value:

__ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

[in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 285 of file cmsis_tiarmclang.h.

◆ __BKPT [6/19]

#define __BKPT ( value )

Value:

__breakpoint(value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

[in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 254 of file cmsis_armcc.h.

◆ __BKPT [7/19]

#define __BKPT ( value )

Value:

__ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

[in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 285 of file cmsis_armclang.h.

◆ __BKPT [8/19]

#define __BKPT ( value )

Value:

__ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

[in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 282 of file cmsis_armclang_ltm.h.

◆ __BKPT [9/19]

#define __BKPT ( value )

Value:

__ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

[in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 370 of file cmsis_gcc.h.

◆ __BKPT [10/19]

#define __BKPT ( value )

Value:

__ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

[in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 285 of file cmsis_tiarmclang.h.

◆ __BKPT [11/19]

#define __BKPT ( value )

Value:

__breakpoint(value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

[in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 254 of file cmsis_armcc.h.

◆ __BKPT [12/19]

#define __BKPT ( value )

Value:

__ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

[in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 285 of file cmsis_armclang.h.

◆ __BKPT [13/19]

#define __BKPT ( value )

Value:

__ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

[in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 282 of file cmsis_armclang_ltm.h.

◆ __BKPT [14/19]

#define __BKPT ( value )

Value:

__ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

[in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 370 of file cmsis_gcc.h.

◆ __BKPT [15/19]

#define __BKPT ( value )

Value:

__breakpoint(value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

[in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 254 of file cmsis_armcc.h.

◆ __BKPT [16/19]

#define __BKPT ( value )

Value:

__ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

[in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 285 of file cmsis_armclang.h.

◆ __BKPT [17/19]

#define __BKPT ( value )

Value:

__ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

[in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 282 of file cmsis_armclang_ltm.h.

◆ __BKPT [18/19]

#define __BKPT ( value )

Value:

__ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

[in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 370 of file cmsis_gcc.h.

◆ __BKPT [19/19]

#define __BKPT ( value )

Value:

__ASM volatile ("bkpt "#value)

Breakpoint.

Causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.

Parameters

[in] value is ignored by the processor. If required, a debugger can use it to store additional information about the breakpoint.

Definition at line 285 of file cmsis_tiarmclang.h.

◆ __CLZ [1/4]

#define __CLZ __clz

Count leading zeros.

Counts the number of leading zeros of a data value.

Parameters

[in] value Value to count the leading zeros

Returns: number of leading zeros in value

Definition at line 291 of file cmsis_armcc.h.

◆ __CLZ [2/4]

#define __CLZ __clz

Count leading zeros.

Counts the number of leading zeros of a data value.

Parameters

[in] value Value to count the leading zeros

Returns: number of leading zeros in value

Definition at line 291 of file cmsis_armcc.h.

◆ __CLZ [3/4]

#define __CLZ __clz

Count leading zeros.

Counts the number of leading zeros of a data value.

Parameters

[in] value Value to count the leading zeros

Returns: number of leading zeros in value

Definition at line 291 of file cmsis_armcc.h.

◆ __CLZ [4/4]

#define __CLZ __clz

Count leading zeros.

Counts the number of leading zeros of a data value.

Parameters

[in] value Value to count the leading zeros

Returns: number of leading zeros in value

Definition at line 291 of file cmsis_armcc.h.

◆ __CMSIS_GCC_OUT_REG [1/15]

#define __CMSIS_GCC_OUT_REG ( r )

Value:

"=r" (r)

Definition at line 176 of file cmsis_armclang.h.

◆ __CMSIS_GCC_OUT_REG [2/15]

#define __CMSIS_GCC_OUT_REG ( r )

Value:

"=r" (r)

Definition at line 174 of file cmsis_armclang_ltm.h.

◆ __CMSIS_GCC_OUT_REG [3/15]

#define __CMSIS_GCC_OUT_REG ( r )

Value:

"=r" (r)

Definition at line 225 of file cmsis_gcc.h.

◆ __CMSIS_GCC_OUT_REG [4/15]

#define __CMSIS_GCC_OUT_REG ( r )

Value:

"=r" (r)

Definition at line 176 of file cmsis_tiarmclang.h.

◆ __CMSIS_GCC_OUT_REG [5/15]

#define __CMSIS_GCC_OUT_REG ( r )

Value:

"=r" (r)

Definition at line 176 of file cmsis_armclang.h.

◆ __CMSIS_GCC_OUT_REG [6/15]

#define __CMSIS_GCC_OUT_REG ( r )

Value:

"=r" (r)

Definition at line 174 of file cmsis_armclang_ltm.h.

◆ __CMSIS_GCC_OUT_REG [7/15]

#define __CMSIS_GCC_OUT_REG ( r )

Value:

"=r" (r)

Definition at line 225 of file cmsis_gcc.h.

◆ __CMSIS_GCC_OUT_REG [8/15]

#define __CMSIS_GCC_OUT_REG ( r )

Value:

"=r" (r)

Definition at line 176 of file cmsis_tiarmclang.h.

◆ __CMSIS_GCC_OUT_REG [9/15]

#define __CMSIS_GCC_OUT_REG ( r )

Value:

"=r" (r)

Definition at line 176 of file cmsis_armclang.h.

◆ __CMSIS_GCC_OUT_REG [10/15]

#define __CMSIS_GCC_OUT_REG ( r )

Value:

"=r" (r)

Definition at line 174 of file cmsis_armclang_ltm.h.

◆ __CMSIS_GCC_OUT_REG [11/15]

#define __CMSIS_GCC_OUT_REG ( r )

Value:

"=r" (r)

Definition at line 225 of file cmsis_gcc.h.

◆ __CMSIS_GCC_OUT_REG [12/15]

#define __CMSIS_GCC_OUT_REG ( r )

Value:

"=r" (r)

Definition at line 176 of file cmsis_armclang.h.

◆ __CMSIS_GCC_OUT_REG [13/15]

#define __CMSIS_GCC_OUT_REG ( r )

Value:

"=r" (r)

Definition at line 174 of file cmsis_armclang_ltm.h.

◆ __CMSIS_GCC_OUT_REG [14/15]

#define __CMSIS_GCC_OUT_REG ( r )

Value:

"=r" (r)

Definition at line 225 of file cmsis_gcc.h.

◆ __CMSIS_GCC_OUT_REG [15/15]

#define __CMSIS_GCC_OUT_REG ( r )

Value:

"=r" (r)

Definition at line 176 of file cmsis_tiarmclang.h.

◆ __CMSIS_GCC_RW_REG [1/11]

#define __CMSIS_GCC_RW_REG ( r )

Value:

"+r" (r)

Definition at line 177 of file cmsis_armclang.h.

◆ __CMSIS_GCC_RW_REG [2/11]

#define __CMSIS_GCC_RW_REG ( r )

Value:

"+r" (r)

Definition at line 226 of file cmsis_gcc.h.

◆ __CMSIS_GCC_RW_REG [3/11]

#define __CMSIS_GCC_RW_REG ( r )

Value:

"+r" (r)

Definition at line 177 of file cmsis_tiarmclang.h.

◆ __CMSIS_GCC_RW_REG [4/11]

#define __CMSIS_GCC_RW_REG ( r )

Value:

"+r" (r)

Definition at line 177 of file cmsis_armclang.h.

◆ __CMSIS_GCC_RW_REG [5/11]

#define __CMSIS_GCC_RW_REG ( r )

Value:

"+r" (r)

Definition at line 226 of file cmsis_gcc.h.

◆ __CMSIS_GCC_RW_REG [6/11]

#define __CMSIS_GCC_RW_REG ( r )

Value:

"+r" (r)

Definition at line 177 of file cmsis_tiarmclang.h.

◆ __CMSIS_GCC_RW_REG [7/11]

#define __CMSIS_GCC_RW_REG ( r )

Value:

"+r" (r)

Definition at line 177 of file cmsis_armclang.h.

◆ __CMSIS_GCC_RW_REG [8/11]

#define __CMSIS_GCC_RW_REG ( r )

Value:

"+r" (r)

Definition at line 226 of file cmsis_gcc.h.

◆ __CMSIS_GCC_RW_REG [9/11]

#define __CMSIS_GCC_RW_REG ( r )

Value:

"+r" (r)

Definition at line 177 of file cmsis_armclang.h.

◆ __CMSIS_GCC_RW_REG [10/11]

#define __CMSIS_GCC_RW_REG ( r )

Value:

"+r" (r)

Definition at line 226 of file cmsis_gcc.h.

◆ __CMSIS_GCC_RW_REG [11/11]

#define __CMSIS_GCC_RW_REG ( r )

Value:

"+r" (r)

Definition at line 177 of file cmsis_tiarmclang.h.

◆ __CMSIS_GCC_USE_REG [1/15]

#define __CMSIS_GCC_USE_REG ( r )

Value:

"r" (r)

Definition at line 178 of file cmsis_armclang.h.

◆ __CMSIS_GCC_USE_REG [2/15]

#define __CMSIS_GCC_USE_REG ( r )

Value:

"r" (r)

Definition at line 175 of file cmsis_armclang_ltm.h.

◆ __CMSIS_GCC_USE_REG [3/15]

#define __CMSIS_GCC_USE_REG ( r )

Value:

"r" (r)

Definition at line 227 of file cmsis_gcc.h.

◆ __CMSIS_GCC_USE_REG [4/15]

#define __CMSIS_GCC_USE_REG ( r )

Value:

"r" (r)

Definition at line 178 of file cmsis_tiarmclang.h.

◆ __CMSIS_GCC_USE_REG [5/15]

#define __CMSIS_GCC_USE_REG ( r )

Value:

"r" (r)

Definition at line 178 of file cmsis_armclang.h.

◆ __CMSIS_GCC_USE_REG [6/15]

#define __CMSIS_GCC_USE_REG ( r )

Value:

"r" (r)

Definition at line 175 of file cmsis_armclang_ltm.h.

◆ __CMSIS_GCC_USE_REG [7/15]

#define __CMSIS_GCC_USE_REG ( r )

Value:

"r" (r)

Definition at line 227 of file cmsis_gcc.h.

◆ __CMSIS_GCC_USE_REG [8/15]

#define __CMSIS_GCC_USE_REG ( r )

Value:

"r" (r)

Definition at line 178 of file cmsis_tiarmclang.h.

◆ __CMSIS_GCC_USE_REG [9/15]

#define __CMSIS_GCC_USE_REG ( r )

Value:

"r" (r)

Definition at line 178 of file cmsis_armclang.h.

◆ __CMSIS_GCC_USE_REG [10/15]

#define __CMSIS_GCC_USE_REG ( r )

Value:

"r" (r)

Definition at line 175 of file cmsis_armclang_ltm.h.

◆ __CMSIS_GCC_USE_REG [11/15]

#define __CMSIS_GCC_USE_REG ( r )

Value:

"r" (r)

Definition at line 227 of file cmsis_gcc.h.

◆ __CMSIS_GCC_USE_REG [12/15]

#define __CMSIS_GCC_USE_REG ( r )

Value:

"r" (r)

Definition at line 178 of file cmsis_armclang.h.

◆ __CMSIS_GCC_USE_REG [13/15]

#define __CMSIS_GCC_USE_REG ( r )

Value:

"r" (r)

Definition at line 175 of file cmsis_armclang_ltm.h.

◆ __CMSIS_GCC_USE_REG [14/15]

#define __CMSIS_GCC_USE_REG ( r )

Value:

"r" (r)

Definition at line 227 of file cmsis_gcc.h.

◆ __CMSIS_GCC_USE_REG [15/15]

#define __CMSIS_GCC_USE_REG ( r )

Value:

"r" (r)

Definition at line 178 of file cmsis_tiarmclang.h.

◆ __DMB [1/15]

__STATIC_FORCEINLINE void __DMB ( void )

Value:

__dmb(0xF)

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 195 of file cmsis_armcc.h.

◆ __DMB [2/15]

#define __DMB ( void )

Value:

__builtin_arm_dmb(0xF)

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 230 of file cmsis_armclang.h.

◆ __DMB [3/15]

#define __DMB ( void )

Value:

__builtin_arm_dmb(0xF)

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 227 of file cmsis_armclang_ltm.h.

◆ __DMB [4/15]

#define __DMB ( void )

Value:

__builtin_arm_dmb(0xF)

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 230 of file cmsis_tiarmclang.h.

◆ __DMB [5/15]

#define __DMB ( void )

Value:

__dmb(0xF)

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 195 of file cmsis_armcc.h.

◆ __DMB [6/15]

#define __DMB ( void )

Value:

__builtin_arm_dmb(0xF)

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 230 of file cmsis_armclang.h.

◆ __DMB [7/15]

#define __DMB ( void )

Value:

__builtin_arm_dmb(0xF)

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 227 of file cmsis_armclang_ltm.h.

◆ __DMB [8/15]

#define __DMB ( void )

Value:

__builtin_arm_dmb(0xF)

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 230 of file cmsis_tiarmclang.h.

◆ __DMB [9/15]

#define __DMB ( void )

Value:

__dmb(0xF)

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 195 of file cmsis_armcc.h.

◆ __DMB [10/15]

#define __DMB ( void )

Value:

__builtin_arm_dmb(0xF)

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 230 of file cmsis_armclang.h.

◆ __DMB [11/15]

#define __DMB ( void )

Value:

__builtin_arm_dmb(0xF)

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 227 of file cmsis_armclang_ltm.h.

◆ __DMB [12/15]

#define __DMB ( void )

Value:

__dmb(0xF)

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 195 of file cmsis_armcc.h.

◆ __DMB [13/15]

#define __DMB ( void )

Value:

__builtin_arm_dmb(0xF)

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 230 of file cmsis_armclang.h.

◆ __DMB [14/15]

#define __DMB ( void )

Value:

__builtin_arm_dmb(0xF)

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 227 of file cmsis_armclang_ltm.h.

◆ __DMB [15/15]

#define __DMB ( void )

Value:

__builtin_arm_dmb(0xF)

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 230 of file cmsis_tiarmclang.h.

◆ __DSB [1/15]

__STATIC_FORCEINLINE void __DSB ( void )

Value:

__dsb(0xF)

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 188 of file cmsis_armcc.h.

◆ __DSB [2/15]

#define __DSB ( void )

Value:

__builtin_arm_dsb(0xF)

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 222 of file cmsis_armclang.h.

◆ __DSB [3/15]

#define __DSB ( void )

Value:

__builtin_arm_dsb(0xF)

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 219 of file cmsis_armclang_ltm.h.

◆ __DSB [4/15]

#define __DSB ( void )

Value:

__builtin_arm_dsb(0xF)

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 222 of file cmsis_tiarmclang.h.

◆ __DSB [5/15]

#define __DSB ( void )

Value:

__dsb(0xF)

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 188 of file cmsis_armcc.h.

◆ __DSB [6/15]

#define __DSB ( void )

Value:

__builtin_arm_dsb(0xF)

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 222 of file cmsis_armclang.h.

◆ __DSB [7/15]

#define __DSB ( void )

Value:

__builtin_arm_dsb(0xF)

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 219 of file cmsis_armclang_ltm.h.

◆ __DSB [8/15]

#define __DSB ( void )

Value:

__builtin_arm_dsb(0xF)

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 222 of file cmsis_tiarmclang.h.

◆ __DSB [9/15]

#define __DSB ( void )

Value:

__dsb(0xF)

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 188 of file cmsis_armcc.h.

◆ __DSB [10/15]

#define __DSB ( void )

Value:

__builtin_arm_dsb(0xF)

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 222 of file cmsis_armclang.h.

◆ __DSB [11/15]

#define __DSB ( void )

Value:

__builtin_arm_dsb(0xF)

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 219 of file cmsis_armclang_ltm.h.

◆ __DSB [12/15]

#define __DSB ( void )

Value:

__dsb(0xF)

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 188 of file cmsis_armcc.h.

◆ __DSB [13/15]

#define __DSB ( void )

Value:

__builtin_arm_dsb(0xF)

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 222 of file cmsis_armclang.h.

◆ __DSB [14/15]

#define __DSB ( void )

Value:

__builtin_arm_dsb(0xF)

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 219 of file cmsis_armclang_ltm.h.

◆ __DSB [15/15]

#define __DSB ( void )

Value:

__builtin_arm_dsb(0xF)

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 222 of file cmsis_tiarmclang.h.

◆ __ISB [1/15]

__STATIC_FORCEINLINE void __ISB ( void )

Value:

__isb(0xF)

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 181 of file cmsis_armcc.h.

◆ __ISB [2/15]

#define __ISB ( void )

Value:

__builtin_arm_isb(0xF)

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 215 of file cmsis_armclang.h.

◆ __ISB [3/15]

#define __ISB ( void )

Value:

__builtin_arm_isb(0xF)

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 212 of file cmsis_armclang_ltm.h.

◆ __ISB [4/15]

#define __ISB ( void )

Value:

__builtin_arm_isb(0xF)

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 215 of file cmsis_tiarmclang.h.

◆ __ISB [5/15]

#define __ISB ( void )

Value:

__isb(0xF)

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 181 of file cmsis_armcc.h.

◆ __ISB [6/15]

#define __ISB ( void )

Value:

__builtin_arm_isb(0xF)

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 215 of file cmsis_armclang.h.

◆ __ISB [7/15]

#define __ISB ( void )

Value:

__builtin_arm_isb(0xF)

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 212 of file cmsis_armclang_ltm.h.

◆ __ISB [8/15]

#define __ISB ( void )

Value:

__builtin_arm_isb(0xF)

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 215 of file cmsis_tiarmclang.h.

◆ __ISB [9/15]

#define __ISB ( void )

Value:

__isb(0xF)

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 181 of file cmsis_armcc.h.

◆ __ISB [10/15]

#define __ISB ( void )

Value:

__builtin_arm_isb(0xF)

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 215 of file cmsis_armclang.h.

◆ __ISB [11/15]

#define __ISB ( void )

Value:

__builtin_arm_isb(0xF)

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 212 of file cmsis_armclang_ltm.h.

◆ __ISB [12/15]

#define __ISB ( void )

Value:

__isb(0xF)

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 181 of file cmsis_armcc.h.

◆ __ISB [13/15]

#define __ISB ( void )

Value:

__builtin_arm_isb(0xF)

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 215 of file cmsis_armclang.h.

◆ __ISB [14/15]

#define __ISB ( void )

Value:

__builtin_arm_isb(0xF)

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 212 of file cmsis_armclang_ltm.h.

◆ __ISB [15/15]

#define __ISB ( void )

Value:

__builtin_arm_isb(0xF)

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 215 of file cmsis_tiarmclang.h.

◆ __NOP [1/19]

#define __NOP __nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 150 of file cmsis_armcc.h.

◆ __NOP [2/19]

#define __NOP __builtin_arm_nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 185 of file cmsis_armclang.h.

◆ __NOP [3/19]

#define __NOP __builtin_arm_nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 182 of file cmsis_armclang_ltm.h.

◆ __NOP [4/19]

#define __NOP ( )

Value:

__ASM volatile ("nop")

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 234 of file cmsis_gcc.h.

◆ __NOP [5/19]

#define __NOP __builtin_arm_nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 185 of file cmsis_tiarmclang.h.

◆ __NOP [6/19]

#define __NOP __nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 150 of file cmsis_armcc.h.

◆ __NOP [7/19]

#define __NOP __builtin_arm_nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 185 of file cmsis_armclang.h.

◆ __NOP [8/19]

#define __NOP __builtin_arm_nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 182 of file cmsis_armclang_ltm.h.

◆ __NOP [9/19]

#define __NOP ( )

Value:

__ASM volatile ("nop")

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 234 of file cmsis_gcc.h.

◆ __NOP [10/19]

#define __NOP __builtin_arm_nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 185 of file cmsis_tiarmclang.h.

◆ __NOP [11/19]

#define __NOP __nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 150 of file cmsis_armcc.h.

◆ __NOP [12/19]

#define __NOP __builtin_arm_nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 185 of file cmsis_armclang.h.

◆ __NOP [13/19]

#define __NOP __builtin_arm_nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 182 of file cmsis_armclang_ltm.h.

◆ __NOP [14/19]

#define __NOP ( )

Value:

__ASM volatile ("nop")

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 234 of file cmsis_gcc.h.

◆ __NOP [15/19]

#define __NOP __nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 150 of file cmsis_armcc.h.

◆ __NOP [16/19]

#define __NOP __builtin_arm_nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 185 of file cmsis_armclang.h.

◆ __NOP [17/19]

#define __NOP __builtin_arm_nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 182 of file cmsis_armclang_ltm.h.

◆ __NOP [18/19]

#define __NOP ( )

Value:

__ASM volatile ("nop")

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 234 of file cmsis_gcc.h.

◆ __NOP [19/19]

#define __NOP __builtin_arm_nop

No Operation.

No Operation does nothing. This instruction can be used for code alignment purposes.

Definition at line 185 of file cmsis_tiarmclang.h.

◆ __RBIT [1/11]

#define __RBIT __builtin_arm_rbit

Reverse bit order of value.

Reverses the bit order of the given value.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 294 of file cmsis_armclang.h.

◆ __RBIT [2/11]

#define __RBIT __builtin_arm_rbit

Reverse bit order of value.

Reverses the bit order of the given value.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 291 of file cmsis_armclang_ltm.h.

◆ __RBIT [3/11]

#define __RBIT __builtin_arm_rbit

Reverse bit order of value.

Reverses the bit order of the given value.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 294 of file cmsis_tiarmclang.h.

◆ __RBIT [4/11]

#define __RBIT __builtin_arm_rbit

Reverse bit order of value.

Reverses the bit order of the given value.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 294 of file cmsis_armclang.h.

◆ __RBIT [5/11]

#define __RBIT __builtin_arm_rbit

Reverse bit order of value.

Reverses the bit order of the given value.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 291 of file cmsis_armclang_ltm.h.

◆ __RBIT [6/11]

#define __RBIT __builtin_arm_rbit

Reverse bit order of value.

Reverses the bit order of the given value.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 294 of file cmsis_tiarmclang.h.

◆ __RBIT [7/11]

#define __RBIT __builtin_arm_rbit

Reverse bit order of value.

Reverses the bit order of the given value.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 294 of file cmsis_armclang.h.

◆ __RBIT [8/11]

#define __RBIT __builtin_arm_rbit

Reverse bit order of value.

Reverses the bit order of the given value.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 291 of file cmsis_armclang_ltm.h.

◆ __RBIT [9/11]

#define __RBIT __builtin_arm_rbit

Reverse bit order of value.

Reverses the bit order of the given value.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 294 of file cmsis_armclang.h.

◆ __RBIT [10/11]

#define __RBIT __builtin_arm_rbit

Reverse bit order of value.

Reverses the bit order of the given value.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 291 of file cmsis_armclang_ltm.h.

◆ __RBIT [11/11]

#define __RBIT __builtin_arm_rbit

Reverse bit order of value.

Reverses the bit order of the given value.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 294 of file cmsis_tiarmclang.h.

◆ __REV [1/15]

#define __REV __rev

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 204 of file cmsis_armcc.h.

◆ __REV [2/15]

#define __REV ( value )

Value:

__builtin_bswap32(value)

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 239 of file cmsis_armclang.h.

◆ __REV [3/15]

#define __REV ( value )

Value:

__builtin_bswap32(value)

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 236 of file cmsis_armclang_ltm.h.

◆ __REV [4/15]

#define __REV ( value )

Value:

__builtin_bswap32(value)

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 239 of file cmsis_tiarmclang.h.

◆ __REV [5/15]

#define __REV __rev

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 204 of file cmsis_armcc.h.

◆ __REV [6/15]

#define __REV ( value )

Value:

__builtin_bswap32(value)

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 239 of file cmsis_armclang.h.

◆ __REV [7/15]

#define __REV ( value )

Value:

__builtin_bswap32(value)

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 236 of file cmsis_armclang_ltm.h.

◆ __REV [8/15]

#define __REV ( value )

Value:

__builtin_bswap32(value)

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 239 of file cmsis_tiarmclang.h.

◆ __REV [9/15]

#define __REV __rev

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 204 of file cmsis_armcc.h.

◆ __REV [10/15]

#define __REV ( value )

Value:

__builtin_bswap32(value)

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 239 of file cmsis_armclang.h.

◆ __REV [11/15]

#define __REV ( value )

Value:

__builtin_bswap32(value)

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 236 of file cmsis_armclang_ltm.h.

◆ __REV [12/15]

#define __REV __rev

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 204 of file cmsis_armcc.h.

◆ __REV [13/15]

#define __REV ( value )

Value:

__builtin_bswap32(value)

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 239 of file cmsis_armclang.h.

◆ __REV [14/15]

#define __REV ( value )

Value:

__builtin_bswap32(value)

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 236 of file cmsis_armclang_ltm.h.

◆ __REV [15/15]

#define __REV ( value )

Value:

__builtin_bswap32(value)

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 239 of file cmsis_tiarmclang.h.

◆ __REV16 [1/11]

#define __REV16 ( value )

Value:

__ROR(__REV(value), 16)

__ROR

#define __ROR

Rotate Right in unsigned value (32 bit)

Definition cmsis_armcc.h:244

__REV

#define __REV(value)

Reverse byte order (32 bit)

Definition cmsis_armclang.h:239

Reverse byte order (16 bit)

Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 248 of file cmsis_armclang.h.

◆ __REV16 [2/11]

#define __REV16 ( value )

Value:

__ROR(__REV(value), 16)

Reverse byte order (16 bit)

Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 245 of file cmsis_armclang_ltm.h.

◆ __REV16 [3/11]

#define __REV16 ( value )

Value:

__ROR(__REV(value), 16)

Reverse byte order (16 bit)

Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 248 of file cmsis_tiarmclang.h.

◆ __REV16 [4/11]

#define __REV16 ( value )

Value:

__ROR(__REV(value), 16)

Reverse byte order (16 bit)

Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 248 of file cmsis_armclang.h.

◆ __REV16 [5/11]

#define __REV16 ( value )

Value:

__ROR(__REV(value), 16)

Reverse byte order (16 bit)

Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 245 of file cmsis_armclang_ltm.h.

◆ __REV16 [6/11]

#define __REV16 ( value )

Value:

__ROR(__REV(value), 16)

Reverse byte order (16 bit)

Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 248 of file cmsis_tiarmclang.h.

◆ __REV16 [7/11]

#define __REV16 ( value )

Value:

__ROR(__REV(value), 16)

Reverse byte order (16 bit)

Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 248 of file cmsis_armclang.h.

◆ __REV16 [8/11]

#define __REV16 ( value )

Value:

__ROR(__REV(value), 16)

Reverse byte order (16 bit)

Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 245 of file cmsis_armclang_ltm.h.

◆ __REV16 [9/11]

#define __REV16 ( value )

Value:

__ROR(__REV(value), 16)

Reverse byte order (16 bit)

Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 248 of file cmsis_armclang.h.

◆ __REV16 [10/11]

#define __REV16 ( value )

Value:

__ROR(__REV(value), 16)

Reverse byte order (16 bit)

Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 245 of file cmsis_armclang_ltm.h.

◆ __REV16 [11/11]

#define __REV16 ( value )

Value:

__ROR(__REV(value), 16)

Reverse byte order (16 bit)

Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 248 of file cmsis_tiarmclang.h.

◆ __REVSH [1/11]

#define __REVSH ( value )

Value:

(int16_t)__builtin_bswap16(value)

Reverse byte order (16 bit)

Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 257 of file cmsis_armclang.h.

◆ __REVSH [2/11]

#define __REVSH ( value )

Value:

(int16_t)__builtin_bswap16(value)

Reverse byte order (16 bit)

Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 254 of file cmsis_armclang_ltm.h.

◆ __REVSH [3/11]

#define __REVSH ( value )

Value:

(int16_t)__builtin_bswap16(value)

Reverse byte order (16 bit)

Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 257 of file cmsis_tiarmclang.h.

◆ __REVSH [4/11]

#define __REVSH ( value )

Value:

(int16_t)__builtin_bswap16(value)

Reverse byte order (16 bit)

Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 257 of file cmsis_armclang.h.

◆ __REVSH [5/11]

#define __REVSH ( value )

Value:

(int16_t)__builtin_bswap16(value)

Reverse byte order (16 bit)

Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 254 of file cmsis_armclang_ltm.h.

◆ __REVSH [6/11]

#define __REVSH ( value )

Value:

(int16_t)__builtin_bswap16(value)

Reverse byte order (16 bit)

Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 257 of file cmsis_tiarmclang.h.

◆ __REVSH [7/11]

#define __REVSH ( value )

Value:

(int16_t)__builtin_bswap16(value)

Reverse byte order (16 bit)

Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 257 of file cmsis_armclang.h.

◆ __REVSH [8/11]

#define __REVSH ( value )

Value:

(int16_t)__builtin_bswap16(value)

Reverse byte order (16 bit)

Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 254 of file cmsis_armclang_ltm.h.

◆ __REVSH [9/11]

#define __REVSH ( value )

Value:

(int16_t)__builtin_bswap16(value)

Reverse byte order (16 bit)

Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 257 of file cmsis_armclang.h.

◆ __REVSH [10/11]

#define __REVSH ( value )

Value:

(int16_t)__builtin_bswap16(value)

Reverse byte order (16 bit)

Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 254 of file cmsis_armclang_ltm.h.

◆ __REVSH [11/11]

#define __REVSH ( value )

Value:

(int16_t)__builtin_bswap16(value)

Reverse byte order (16 bit)

Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 257 of file cmsis_tiarmclang.h.

◆ __ROR [1/4]

#define __ROR __ror

Rotate Right in unsigned value (32 bit)

Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.

Parameters

[in]	op1	Value to rotate
[in]	op2	Number of Bits to rotate

Returns: Rotated value

Definition at line 244 of file cmsis_armcc.h.

◆ __ROR [2/4]

#define __ROR __ror

Rotate Right in unsigned value (32 bit)

Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.

Parameters

[in]	op1	Value to rotate
[in]	op2	Number of Bits to rotate

Returns: Rotated value

Definition at line 244 of file cmsis_armcc.h.

◆ __ROR [3/4]

#define __ROR __ror

Rotate Right in unsigned value (32 bit)

Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.

Parameters

[in]	op1	Value to rotate
[in]	op2	Number of Bits to rotate

Returns: Rotated value

Definition at line 244 of file cmsis_armcc.h.

◆ __ROR [4/4]

#define __ROR __ror

Rotate Right in unsigned value (32 bit)

Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.

Parameters

[in]	op1	Value to rotate
[in]	op2	Number of Bits to rotate

Returns: Rotated value

Definition at line 244 of file cmsis_armcc.h.

◆ __SEV [1/19]

#define __SEV __sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 172 of file cmsis_armcc.h.

◆ __SEV [2/19]

#define __SEV __builtin_arm_sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 206 of file cmsis_armclang.h.

◆ __SEV [3/19]

#define __SEV __builtin_arm_sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 203 of file cmsis_armclang_ltm.h.

◆ __SEV [4/19]

#define __SEV ( )

Value:

__ASM volatile ("sev")

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 255 of file cmsis_gcc.h.

◆ __SEV [5/19]

#define __SEV __builtin_arm_sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 206 of file cmsis_tiarmclang.h.

◆ __SEV [6/19]

#define __SEV __sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 172 of file cmsis_armcc.h.

◆ __SEV [7/19]

#define __SEV __builtin_arm_sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 206 of file cmsis_armclang.h.

◆ __SEV [8/19]

#define __SEV __builtin_arm_sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 203 of file cmsis_armclang_ltm.h.

◆ __SEV [9/19]

#define __SEV ( )

Value:

__ASM volatile ("sev")

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 255 of file cmsis_gcc.h.

◆ __SEV [10/19]

#define __SEV __builtin_arm_sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 206 of file cmsis_tiarmclang.h.

◆ __SEV [11/19]

#define __SEV __sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 172 of file cmsis_armcc.h.

◆ __SEV [12/19]

#define __SEV __builtin_arm_sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 206 of file cmsis_armclang.h.

◆ __SEV [13/19]

#define __SEV __builtin_arm_sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 203 of file cmsis_armclang_ltm.h.

◆ __SEV [14/19]

#define __SEV ( )

Value:

__ASM volatile ("sev")

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 255 of file cmsis_gcc.h.

◆ __SEV [15/19]

#define __SEV __sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 172 of file cmsis_armcc.h.

◆ __SEV [16/19]

#define __SEV __builtin_arm_sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 206 of file cmsis_armclang.h.

◆ __SEV [17/19]

#define __SEV __builtin_arm_sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 203 of file cmsis_armclang_ltm.h.

◆ __SEV [18/19]

#define __SEV ( )

Value:

__ASM volatile ("sev")

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 255 of file cmsis_gcc.h.

◆ __SEV [19/19]

#define __SEV __builtin_arm_sev

Send Event.

Send Event is a hint instruction. It causes an event to be signaled to the CPU.

Definition at line 206 of file cmsis_tiarmclang.h.

◆ __WFE [1/19]

#define __WFE __wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 165 of file cmsis_armcc.h.

◆ __WFE [2/19]

#define __WFE __builtin_arm_wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 199 of file cmsis_armclang.h.

◆ __WFE [3/19]

#define __WFE __builtin_arm_wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 196 of file cmsis_armclang_ltm.h.

◆ __WFE [4/19]

#define __WFE ( )

Value:

__ASM volatile ("wfe":::"memory")

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 248 of file cmsis_gcc.h.

◆ __WFE [5/19]

#define __WFE __builtin_arm_wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 199 of file cmsis_tiarmclang.h.

◆ __WFE [6/19]

#define __WFE __wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 165 of file cmsis_armcc.h.

◆ __WFE [7/19]

#define __WFE __builtin_arm_wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 199 of file cmsis_armclang.h.

◆ __WFE [8/19]

#define __WFE __builtin_arm_wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 196 of file cmsis_armclang_ltm.h.

◆ __WFE [9/19]

#define __WFE ( )

Value:

__ASM volatile ("wfe":::"memory")

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 248 of file cmsis_gcc.h.

◆ __WFE [10/19]

#define __WFE __builtin_arm_wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 199 of file cmsis_tiarmclang.h.

◆ __WFE [11/19]

#define __WFE __wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 165 of file cmsis_armcc.h.

◆ __WFE [12/19]

#define __WFE __builtin_arm_wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 199 of file cmsis_armclang.h.

◆ __WFE [13/19]

#define __WFE __builtin_arm_wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 196 of file cmsis_armclang_ltm.h.

◆ __WFE [14/19]

#define __WFE ( )

Value:

__ASM volatile ("wfe":::"memory")

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 248 of file cmsis_gcc.h.

◆ __WFE [15/19]

#define __WFE __wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 165 of file cmsis_armcc.h.

◆ __WFE [16/19]

#define __WFE __builtin_arm_wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 199 of file cmsis_armclang.h.

◆ __WFE [17/19]

#define __WFE __builtin_arm_wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 196 of file cmsis_armclang_ltm.h.

◆ __WFE [18/19]

#define __WFE ( )

Value:

__ASM volatile ("wfe":::"memory")

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 248 of file cmsis_gcc.h.

◆ __WFE [19/19]

#define __WFE __builtin_arm_wfe

Wait For Event.

Wait For Event is a hint instruction that permits the processor to enter a low-power state until one of a number of events occurs.

Definition at line 199 of file cmsis_tiarmclang.h.

◆ __WFI [1/19]

#define __WFI __wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 157 of file cmsis_armcc.h.

◆ __WFI [2/19]

#define __WFI __builtin_arm_wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 191 of file cmsis_armclang.h.

◆ __WFI [3/19]

#define __WFI __builtin_arm_wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 188 of file cmsis_armclang_ltm.h.

◆ __WFI [4/19]

#define __WFI ( )

Value:

__ASM volatile ("wfi":::"memory")

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 240 of file cmsis_gcc.h.

◆ __WFI [5/19]

#define __WFI __builtin_arm_wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 191 of file cmsis_tiarmclang.h.

◆ __WFI [6/19]

#define __WFI __wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 157 of file cmsis_armcc.h.

◆ __WFI [7/19]

#define __WFI __builtin_arm_wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 191 of file cmsis_armclang.h.

◆ __WFI [8/19]

#define __WFI __builtin_arm_wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 188 of file cmsis_armclang_ltm.h.

◆ __WFI [9/19]

#define __WFI ( )

Value:

__ASM volatile ("wfi":::"memory")

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 240 of file cmsis_gcc.h.

◆ __WFI [10/19]

#define __WFI __builtin_arm_wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 191 of file cmsis_tiarmclang.h.

◆ __WFI [11/19]

#define __WFI __wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 157 of file cmsis_armcc.h.

◆ __WFI [12/19]

#define __WFI __builtin_arm_wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 191 of file cmsis_armclang.h.

◆ __WFI [13/19]

#define __WFI __builtin_arm_wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 188 of file cmsis_armclang_ltm.h.

◆ __WFI [14/19]

#define __WFI ( )

Value:

__ASM volatile ("wfi":::"memory")

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 240 of file cmsis_gcc.h.

◆ __WFI [15/19]

#define __WFI __wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 157 of file cmsis_armcc.h.

◆ __WFI [16/19]

#define __WFI __builtin_arm_wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 191 of file cmsis_armclang.h.

◆ __WFI [17/19]

#define __WFI __builtin_arm_wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 188 of file cmsis_armclang_ltm.h.

◆ __WFI [18/19]

#define __WFI ( )

Value:

__ASM volatile ("wfi":::"memory")

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 240 of file cmsis_gcc.h.

◆ __WFI [19/19]

#define __WFI __builtin_arm_wfi

Wait For Interrupt.

Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.

Definition at line 191 of file cmsis_tiarmclang.h.

Function Documentation

◆ attribute() [1/3]

__attribute__ ( (always_inline) )

Reverse bit order of value.

Unsigned Saturate.

Signed Saturate.

Reverses the bit order of the given value.

Parameters

[in] value Value to reverse

Returns: Reversed value

Saturates a signed value.

Parameters

[in]	value	Value to be saturated
[in]	sat	Bit position to saturate to (1..32)

Returns: Saturated value

Saturates an unsigned value.

Parameters

[in]	value	Value to be saturated
[in]	sat	Bit position to saturate to (0..31)

Returns: Saturated value

Definition at line 267 of file cmsis_armcc.h.

◆ attribute() [2/3]

__attribute__ ( (section(".rev16_text")) )

Reverse byte order (16 bit)

Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 214 of file cmsis_armcc.h.

◆ attribute() [3/3]

__attribute__ ( (section(".revsh_text")) )

Reverse byte order (16 bit)

Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 229 of file cmsis_armcc.h.

◆ __CLZ()

__STATIC_FORCEINLINE uint8_t __CLZ ( uint32_t value )

Count leading zeros.

Counts the number of leading zeros of a data value.

Parameters

[in] value Value to count the leading zeros

Returns: number of leading zeros in value

Definition at line 302 of file cmsis_armclang.h.

◆ __DMB()

__STATIC_FORCEINLINE void __DMB ( void )

Data Memory Barrier.

Ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion.

Definition at line 286 of file cmsis_gcc.h.

◆ __DSB()

__STATIC_FORCEINLINE void __DSB ( void )

Data Synchronization Barrier.

Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete.

Definition at line 275 of file cmsis_gcc.h.

◆ __ISB()

__STATIC_FORCEINLINE void __ISB ( void )

Instruction Synchronization Barrier.

Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed.

Definition at line 264 of file cmsis_gcc.h.

◆ __RBIT()

__STATIC_FORCEINLINE uint32_t __RBIT ( uint32_t value )

Reverse bit order of value.

Reverses the bit order of the given value.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 379 of file cmsis_gcc.h.

◆ __REV()

__STATIC_FORCEINLINE uint32_t __REV ( uint32_t value )

Reverse byte order (32 bit)

Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 298 of file cmsis_gcc.h.

◆ __REV16()

__STATIC_FORCEINLINE uint32_t __REV16 ( uint32_t value )

Reverse byte order (16 bit)

Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 317 of file cmsis_gcc.h.

◆ __REVSH()

__STATIC_FORCEINLINE int16_t __REVSH ( int16_t value )

Reverse byte order (16 bit)

Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.

Parameters

[in] value Value to reverse

Returns: Reversed value

Definition at line 332 of file cmsis_gcc.h.

◆ __ROR()

__STATIC_FORCEINLINE uint32_t __ROR	(	uint32_t	op1,
		uint32_t	op2 )

Rotate Right in unsigned value (32 bit)

Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.

Parameters

[in]	op1	Value to rotate
[in]	op2	Number of Bits to rotate

Returns: Rotated value

Definition at line 267 of file cmsis_armclang.h.

◆ __SSAT()

__STATIC_FORCEINLINE int32_t __SSAT	(	int32_t	val,
		uint32_t	sat )

Signed Saturate.

Saturates a signed value.

Parameters

[in]	value	Value to be saturated
[in]	sat	Bit position to saturate to (1..32)

Returns: Saturated value

Definition at line 533 of file cmsis_armclang.h.

◆ __USAT()

__STATIC_FORCEINLINE uint32_t __USAT	(	int32_t	val,
		uint32_t	sat )

Unsigned Saturate.

Saturates an unsigned value.

Parameters

[in]	value	Value to be saturated
[in]	sat	Bit position to saturate to (0..31)

Returns: Saturated value

Definition at line 558 of file cmsis_armclang.h.

Variable Documentation

◆ sat [1/4]

uint32_t sat

Initial value:

{
  if ((sat >= 1U) && (sat <= 32U))
  {
    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
    const int32_t min = -1 - max ;
    if (val > max)
    {
      return max;
    }
    else if (val < min)
    {
      return min;
    }
  }
  return val

Definition at line 487 of file cmsis_armcc.h.

◆ sat [2/4]

uint32_t sat

Initial value:

{
  if ((sat >= 1U) && (sat <= 32U))
  {
    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
    const int32_t min = -1 - max ;
    if (val > max)
    {
      return max;
    }
    else if (val < min)
    {
      return min;
    }
  }
  return val

Definition at line 487 of file cmsis_armcc.h.

◆ sat [3/4]

uint32_t sat

Initial value:

{
  if ((sat >= 1U) && (sat <= 32U))
  {
    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
    const int32_t min = -1 - max ;
    if (val > max)
    {
      return max;
    }
    else if (val < min)
    {
      return min;
    }
  }
  return val

Definition at line 487 of file cmsis_armcc.h.

◆ sat [4/4]

uint32_t sat

Initial value:

{
  if ((sat >= 1U) && (sat <= 32U))
  {
    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
    const int32_t min = -1 - max ;
    if (val > max)
    {
      return max;
    }
    else if (val < min)
    {
      return min;
    }
  }
  return val

Definition at line 487 of file cmsis_armcc.h.

Topics

Macros

Functions

Variables

Detailed Description

Macro Definition Documentation

◆ __BKPT [1/19]

◆ __BKPT [2/19]

◆ __BKPT [3/19]

◆ __BKPT [4/19]

◆ __BKPT [5/19]

◆ __BKPT [6/19]

◆ __BKPT [7/19]

◆ __BKPT [8/19]

◆ __BKPT [9/19]

◆ __BKPT [10/19]

◆ __BKPT [11/19]

◆ __BKPT [12/19]

◆ __BKPT [13/19]

◆ __BKPT [14/19]

◆ __BKPT [15/19]

◆ __BKPT [16/19]

◆ __BKPT [17/19]

◆ __BKPT [18/19]

◆ __BKPT [19/19]

◆ __CLZ [1/4]

◆ __CLZ [2/4]

◆ __CLZ [3/4]

◆ __CLZ [4/4]

◆ __CMSIS_GCC_OUT_REG [1/15]

◆ __CMSIS_GCC_OUT_REG [2/15]

◆ __CMSIS_GCC_OUT_REG [3/15]

◆ __CMSIS_GCC_OUT_REG [4/15]

◆ __CMSIS_GCC_OUT_REG [5/15]

◆ __CMSIS_GCC_OUT_REG [6/15]

◆ __CMSIS_GCC_OUT_REG [7/15]

◆ __CMSIS_GCC_OUT_REG [8/15]

◆ __CMSIS_GCC_OUT_REG [9/15]

◆ __CMSIS_GCC_OUT_REG [10/15]

◆ __CMSIS_GCC_OUT_REG [11/15]

◆ __CMSIS_GCC_OUT_REG [12/15]

◆ __CMSIS_GCC_OUT_REG [13/15]

◆ __CMSIS_GCC_OUT_REG [14/15]

◆ __CMSIS_GCC_OUT_REG [15/15]

◆ __CMSIS_GCC_RW_REG [1/11]

◆ __CMSIS_GCC_RW_REG [2/11]

◆ __CMSIS_GCC_RW_REG [3/11]

◆ __CMSIS_GCC_RW_REG [4/11]

◆ __CMSIS_GCC_RW_REG [5/11]

◆ __CMSIS_GCC_RW_REG [6/11]

◆ __CMSIS_GCC_RW_REG [7/11]

◆ __CMSIS_GCC_RW_REG [8/11]

◆ __CMSIS_GCC_RW_REG [9/11]

◆ __CMSIS_GCC_RW_REG [10/11]

◆ __CMSIS_GCC_RW_REG [11/11]

◆ __CMSIS_GCC_USE_REG [1/15]

◆ __CMSIS_GCC_USE_REG [2/15]

◆ __CMSIS_GCC_USE_REG [3/15]

◆ __CMSIS_GCC_USE_REG [4/15]

◆ __CMSIS_GCC_USE_REG [5/15]

◆ __CMSIS_GCC_USE_REG [6/15]

◆ __CMSIS_GCC_USE_REG [7/15]

◆ __CMSIS_GCC_USE_REG [8/15]

◆ __CMSIS_GCC_USE_REG [9/15]

◆ __CMSIS_GCC_USE_REG [10/15]

◆ __CMSIS_GCC_USE_REG [11/15]

◆ __CMSIS_GCC_USE_REG [12/15]

◆ __CMSIS_GCC_USE_REG [13/15]

◆ __CMSIS_GCC_USE_REG [14/15]

◆ __CMSIS_GCC_USE_REG [15/15]

◆ __DMB [1/15]

◆ __DMB [2/15]

◆ __DMB [3/15]

◆ __DMB [4/15]

◆ __DMB [5/15]

◆ __DMB [6/15]

◆ __DMB [7/15]

◆ __DMB [8/15]

◆ __DMB [9/15]

◆ __DMB [10/15]