_DMA_::DMA_t Member List

This is the complete list of members for _DMA_::DMA_t, including all inherited members.

CH0_AL1_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH0_AL1_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH0_AL1_TRANS_COUNT_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH0_AL1_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH0_AL2_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH0_AL2_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH0_AL2_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH0_AL2_WRITE_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH0_AL3_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH0_AL3_READ_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH0_AL3_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH0_AL3_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH0_CTRL_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH0_DBG_CTDREQ (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH0_DBG_TCR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH0_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH0_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH0_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH10_AL1_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH10_AL1_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH10_AL1_TRANS_COUNT_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH10_AL1_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH10_AL2_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH10_AL2_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH10_AL2_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH10_AL2_WRITE_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH10_AL3_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH10_AL3_READ_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH10_AL3_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH10_AL3_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH10_CTRL_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH10_DBG_CTDREQ (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH10_DBG_TCR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH10_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH10_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH10_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH11_AL1_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH11_AL1_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH11_AL1_TRANS_COUNT_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH11_AL1_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH11_AL2_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH11_AL2_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH11_AL2_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH11_AL2_WRITE_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH11_AL3_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH11_AL3_READ_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH11_AL3_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH11_AL3_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH11_CTRL_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH11_DBG_CTDREQ (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH11_DBG_TCR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH11_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH11_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH11_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH12_AL1_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH12_AL1_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH12_AL1_TRANS_COUNT_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH12_AL1_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH12_AL2_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH12_AL2_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH12_AL2_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH12_AL2_WRITE_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH12_AL3_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH12_AL3_READ_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH12_AL3_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH12_AL3_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH12_CTRL_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH12_DBG_CTDREQ (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH12_DBG_TCR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH12_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH12_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH12_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH13_AL1_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH13_AL1_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH13_AL1_TRANS_COUNT_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH13_AL1_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH13_AL2_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH13_AL2_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH13_AL2_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH13_AL2_WRITE_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH13_AL3_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH13_AL3_READ_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH13_AL3_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH13_AL3_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH13_CTRL_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH13_DBG_CTDREQ (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH13_DBG_TCR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH13_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH13_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH13_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH14_AL1_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH14_AL1_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH14_AL1_TRANS_COUNT_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH14_AL1_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH14_AL2_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH14_AL2_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH14_AL2_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH14_AL2_WRITE_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH14_AL3_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH14_AL3_READ_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH14_AL3_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH14_AL3_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH14_CTRL_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH14_DBG_CTDREQ (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH14_DBG_TCR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH14_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH14_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH14_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH15_AL1_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH15_AL1_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH15_AL1_TRANS_COUNT_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH15_AL1_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH15_AL2_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH15_AL2_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH15_AL2_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH15_AL2_WRITE_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH15_AL3_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH15_AL3_READ_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH15_AL3_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH15_AL3_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH15_CTRL_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH15_DBG_CTDREQ (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH15_DBG_TCR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH15_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH15_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH15_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH1_AL1_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH1_AL1_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH1_AL1_TRANS_COUNT_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH1_AL1_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH1_AL2_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH1_AL2_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH1_AL2_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH1_AL2_WRITE_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH1_AL3_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH1_AL3_READ_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH1_AL3_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH1_AL3_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH1_CTRL_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH1_DBG_CTDREQ (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH1_DBG_TCR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH1_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH1_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH1_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH2_AL1_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH2_AL1_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH2_AL1_TRANS_COUNT_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH2_AL1_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH2_AL2_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH2_AL2_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH2_AL2_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH2_AL2_WRITE_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH2_AL3_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH2_AL3_READ_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH2_AL3_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH2_AL3_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH2_CTRL_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH2_DBG_CTDREQ (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH2_DBG_TCR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH2_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH2_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH2_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH3_AL1_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH3_AL1_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH3_AL1_TRANS_COUNT_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH3_AL1_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH3_AL2_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH3_AL2_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH3_AL2_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH3_AL2_WRITE_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH3_AL3_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH3_AL3_READ_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH3_AL3_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH3_AL3_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH3_CTRL_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH3_DBG_CTDREQ (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH3_DBG_TCR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH3_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH3_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH3_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH4_AL1_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH4_AL1_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH4_AL1_TRANS_COUNT_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH4_AL1_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH4_AL2_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH4_AL2_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH4_AL2_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH4_AL2_WRITE_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH4_AL3_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH4_AL3_READ_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH4_AL3_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH4_AL3_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH4_CTRL_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH4_DBG_CTDREQ (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH4_DBG_TCR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH4_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH4_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH4_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH5_AL1_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH5_AL1_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH5_AL1_TRANS_COUNT_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH5_AL1_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH5_AL2_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH5_AL2_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH5_AL2_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH5_AL2_WRITE_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH5_AL3_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH5_AL3_READ_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH5_AL3_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH5_AL3_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH5_CTRL_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH5_DBG_CTDREQ (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH5_DBG_TCR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH5_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH5_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH5_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH6_AL1_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH6_AL1_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH6_AL1_TRANS_COUNT_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH6_AL1_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH6_AL2_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH6_AL2_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH6_AL2_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH6_AL2_WRITE_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH6_AL3_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH6_AL3_READ_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH6_AL3_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH6_AL3_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH6_CTRL_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH6_DBG_CTDREQ (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH6_DBG_TCR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH6_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH6_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH6_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH7_AL1_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH7_AL1_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH7_AL1_TRANS_COUNT_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH7_AL1_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH7_AL2_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH7_AL2_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH7_AL2_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH7_AL2_WRITE_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH7_AL3_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH7_AL3_READ_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH7_AL3_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH7_AL3_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH7_CTRL_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH7_DBG_CTDREQ (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH7_DBG_TCR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH7_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH7_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH7_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH8_AL1_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH8_AL1_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH8_AL1_TRANS_COUNT_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH8_AL1_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH8_AL2_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH8_AL2_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH8_AL2_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH8_AL2_WRITE_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH8_AL3_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH8_AL3_READ_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH8_AL3_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH8_AL3_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH8_CTRL_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH8_DBG_CTDREQ (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH8_DBG_TCR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH8_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH8_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH8_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH9_AL1_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH9_AL1_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH9_AL1_TRANS_COUNT_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH9_AL1_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH9_AL2_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH9_AL2_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH9_AL2_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH9_AL2_WRITE_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH9_AL3_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH9_AL3_READ_ADDR_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH9_AL3_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH9_AL3_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH9_CTRL_TRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH9_DBG_CTDREQ (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH9_DBG_TCR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH9_READ_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH9_TRANS_COUNT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CH9_WRITE_ADDR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
CHAN_ABORT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_ALTBASE (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_ALTCLR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_ALTSET (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CFG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG0 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG1 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG10 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG11 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG12 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG13 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG14 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG15 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG16 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG17 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG18 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG19 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG2 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG20 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG21 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG22 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG23 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG24 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG25 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG26 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG27 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG28 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG29 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG3 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG30 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG31 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG4 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG5 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG6 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG7 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG8 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CH_SRCCFG9 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_CTLBASE (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_DEVICE_CFG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_ENACLR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_ENASET (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_ERRCLR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_INT0_CLRFLG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_INT0_SRCFLG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_INT1_SRCCFG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_INT2_SRCCFG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_INT3_SRCCFG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_PRIOCLR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_PRIOSET (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_REQMASKCLR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_REQMASKSET (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_STAT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_SW_CHTRIG (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_SWREQ (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_USEBURSTCLR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_USEBURSTSET (defined in _DMA_::DMA_t)	_DMA_::DMA_t
DMA_WAITSTAT (defined in _DMA_::DMA_t)	_DMA_::DMA_t
FIFO_LEVELS (defined in _DMA_::DMA_t)	_DMA_::DMA_t
INTE0 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
INTE1 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
INTE2 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
INTE3 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
INTF0 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
INTF1 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
INTF2 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
INTF3 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
INTR (defined in _DMA_::DMA_t)	_DMA_::DMA_t
INTR1 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
INTR2 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
INTR3 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
INTS0 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
INTS1 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
INTS2 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
INTS3 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
MPU_BAR0 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
MPU_BAR1 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
MPU_BAR2 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
MPU_BAR3 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
MPU_BAR4 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
MPU_BAR5 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
MPU_BAR6 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
MPU_BAR7 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
MPU_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
MPU_LAR0 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
MPU_LAR1 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
MPU_LAR2 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
MPU_LAR3 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
MPU_LAR4 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
MPU_LAR5 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
MPU_LAR6 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
MPU_LAR7 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
MULTI_CHAN_TRIGGER (defined in _DMA_::DMA_t)	_DMA_::DMA_t
N_CHANNELS (defined in _DMA_::DMA_t)	_DMA_::DMA_t
reserved0 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
reserved1 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
reserved10 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
reserved11 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
reserved12 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
reserved13 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
reserved14 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
reserved15 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
reserved16 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
reserved17 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
reserved18 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
reserved2 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
reserved3 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
reserved4 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
reserved5 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
reserved6 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
reserved7 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
reserved8 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
reserved9 (defined in _DMA_::DMA_t)	_DMA_::DMA_t
SECCFG_CH (defined in _DMA_::DMA_t)	_DMA_::DMA_t
SECCFG_IRQ (defined in _DMA_::DMA_t)	_DMA_::DMA_t
SECCFG_MISC (defined in _DMA_::DMA_t)	_DMA_::DMA_t
SNIFF_CTRL (defined in _DMA_::DMA_t)	_DMA_::DMA_t
SNIFF_DATA (defined in _DMA_::DMA_t)	_DMA_::DMA_t
TIMER (defined in _DMA_::DMA_t)	_DMA_::DMA_t