YAHAL
Yet Another Hardware Abstraction Library
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RP2350.h
1// ---------------------------------------------
2// This file is part of
3// _ _ __ _ _ __ __
4// ( \/ ) /__\ ( )_( ) /__\ ( )
5// \ / /(__)\ ) _ ( /(__)\ )(__
6// (__)(__)(__)(_) (_)(__)(__)(____)
7//
8// Yet Another HW Abstraction Library
9// Copyright (C) Andreas Terstegge
10// BSD Licensed (see file LICENSE)
11//
12// ---------------------------------------------
13//
14// Complete CPU and peripheral register
15// definitions for the RP2350 MCU. This
16// file only covers the ARM Cortex-M33
17// CPUs, not the RISCV-processors!
18//
19#ifndef _RP2350_H_
20#define _RP2350_H_
21
22// ======================================================
23// =========== Interrupt Number Definition ============
24// ======================================================
25typedef enum {
26 // ==== ARM Cortex-M33 Specific Interrupt Numbers =====
27 Reset_IRQn = -15,
28 NonMaskableInt_IRQn = -14,
29 HardFault_IRQn = -13,
30 MemoryManagement_IRQn = -12,
31 BusFault_IRQn = -11,
32 UsageFault_IRQn = -10,
33 SecureFault_IRQn = -9,
34 SVCall_IRQn = -5,
35 DebugMonitor_IRQn = -4,
36 PendSV_IRQn = -2,
37 SysTick_IRQn = -1,
38
39 // ======== RP2350 Specific Interrupt Numbers =========
40 TIMER0_IRQ_0_IRQn = 0,
41 TIMER0_IRQ_1_IRQn = 1,
42 TIMER0_IRQ_2_IRQn = 2,
43 TIMER0_IRQ_3_IRQn = 3,
44 TIMER1_IRQ_0_IRQn = 4,
45 TIMER1_IRQ_1_IRQn = 5,
46 TIMER1_IRQ_2_IRQn = 6,
47 TIMER1_IRQ_3_IRQn = 7,
48 PWM_IRQ_WRAP_0_IRQn = 8,
49 PWM_IRQ_WRAP_1_IRQn = 9,
50 DMA_IRQ_0_IRQn = 10,
51 DMA_IRQ_1_IRQn = 11,
52 DMA_IRQ_2_IRQn = 12,
53 DMA_IRQ_3_IRQn = 13,
54 USBCTRL_IRQ_IRQn = 14,
55 PIO0_IRQ_0_IRQn = 15,
56 PIO0_IRQ_1_IRQn = 16,
57 PIO1_IRQ_0_IRQn = 17,
58 PIO1_IRQ_1_IRQn = 18,
59 PIO2_IRQ_0_IRQn = 19,
60 PIO2_IRQ_1_IRQn = 20,
61 IO_IRQ_BANK0_IRQn = 21,
62 IO_IRQ_BANK0_NS_IRQn = 22,
63 IO_IRQ_QSPI_IRQn = 23,
64 IO_IRQ_QSPI_NS_IRQn = 24,
65 SIO_IRQ_FIFO_IRQn = 25,
66 SIO_IRQ_BELL_IRQn = 26,
67 SIO_IRQ_FIFO_NS_IRQn = 27,
68 SIO_IRQ_BELL_NS_IRQn = 28,
69 SIO_IRQ_MTIMECMP_IRQn = 29,
70 CLOCKS_IRQ_IRQn = 30,
71 SPI0_IRQ_IRQn = 31,
72 SPI1_IRQ_IRQn = 32,
73 UART0_IRQ_IRQn = 33,
74 UART1_IRQ_IRQn = 34,
75 ADC_IRQ_FIFO_IRQn = 35,
76 I2C0_IRQ_IRQn = 36,
77 I2C1_IRQ_IRQn = 37,
78 OTP_IRQ_IRQn = 38,
79 TRNG_IRQ_IRQn = 39,
80 PLL_SYS_IRQ_IRQn = 42,
81 PLL_USB_IRQ_IRQn = 43,
82 POWMAN_IRQ_POW_IRQn = 44,
83 POWMAN_IRQ_TIMER_IRQn = 45
84} IRQn_Type;
85
86// ======================================================
87// ====== Processor and Core Peripheral Section =======
88// ======================================================
89
90//== Configuration of the ARM Cortex-M33 Processor and Core Peripherals ==
91#define __CM33_REV 0x0100U // CM33 Core Revision
92#define __NVIC_PRIO_BITS 4 // Number of Bits used for Priority Levels
93#define __Vendor_SysTickConfig 0 // Set to 1 if different SysTick Config is used
94#define __VTOR_PRESENT 1 // Set to 1 if CPU supports Vector Table Offset Register
95#define __MPU_PRESENT 1 // MPU present
96#define __FPU_PRESENT 1 // FPU present
97#define __FPU_DP 0 // Double Precision FPU
98#define __DSP_PRESENT 1 // DSP extension present
99#define __SAUREGION_PRESENT 1 // SAU region present
100
101#include "core_cm33.h" // ARM Cortex-M33 processor and core peripherals
102
103// Additional CPU defines are placed here
104#define EXC_RETURN_BASE 0xffffff80UL
105#define EXC_RETURN_NON_SECURE_STACK_FRAME (0UL << 6)
106#define EXC_RETURN_SECURE_STACK_FRAME (1UL << 6)
107#define EXC_RETURN_CALLEE_STACKING_SKIPPED (0UL << 5)
108#define EXC_RETURN_NORMAL_CALLEE_STACKING (1UL << 5)
109#define EXC_RETURN_EXTENDED_STACK_FRAME (0UL << 4)
110#define EXC_RETURN_INT_ONLY_STACK_FRAME (1UL << 4)
111#define EXC_RETURN_HANDLER_MODE (0UL << 3)
112#define EXC_RETURN_THREAD_MODE (1UL << 3)
113#define EXC_RETURN_MAIN_STACK_POINTER (0UL << 2)
114#define EXC_RETURN_PROCESS_STACK_POINTER (1UL << 2)
115#define EXC_RETURN_EXCEPTION_NON_SECURE (0UL << 0)
116#define EXC_RETURN_EXCEPTION_SECURE (1UL << 0)
117
118#define EXC_RETURN_THREAD_PSP_NOFP (EXC_RETURN_BASE | \
119 EXC_RETURN_SECURE_STACK_FRAME | \
120 EXC_RETURN_EXCEPTION_SECURE | \
121 EXC_RETURN_NORMAL_CALLEE_STACKING | \
122 EXC_RETURN_INT_ONLY_STACK_FRAME | \
123 EXC_RETURN_THREAD_MODE | \
124 EXC_RETURN_PROCESS_STACK_POINTER )
125
126#define EXC_RETURN_THREAD_PSP_NOFP_NS (EXC_RETURN_BASE | \
127 EXC_RETURN_NON_SECURE_STACK_FRAME | \
128 EXC_RETURN_EXCEPTION_NON_SECURE | \
129 EXC_RETURN_NORMAL_CALLEE_STACKING | \
130 EXC_RETURN_INT_ONLY_STACK_FRAME | \
131 EXC_RETURN_THREAD_MODE | \
132 EXC_RETURN_PROCESS_STACK_POINTER )
133
134#define CONTROL_SPSEL_PSP CONTROL_SPSEL_Msk
135#define CONTROL_SPSEL_MSP 0
136#define CONTROL_NOT_PRIV CONTROL_nPRIV_Msk
137#define CONTROL_PRIV 0
138
139// ======================================================
140// ============= MCU Peripheral Section ================
141// ======================================================
142// prevent preprocessor to replace certain names because
143// these names are used in the register header file ...
144#pragma push_macro("DEBUG")
145#pragma push_macro("VERSION")
146
147#undef DEBUG
148#undef VERSION
149#include "RP2350_regs.h" // RP2350 peripherals and registers
150
151#pragma pop_macro("VERSION")
152#pragma pop_macro("DEBUG")
153
154#endif // _RP2350_H
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